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For the Inventor, By the Inventor

Tokyo, Japan

Takeshi Hashizume

This inventor holds 33 USPTO granted patents and 1 EPO patent, primarily in Semiconductor Technology. Top assignees: Mitsubishi Denki Kabushiki Kaisha, Renesas Technology Corp., Renesas Electronics Corporation. Active years: 1980-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takeshi Hashizume. Retrieved from https://idiyas.com/inventor/takeshi-hashizume

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33

% Patents Active = 87.9

 

Average Co-Inventor Count = 2.1

ph-index = 13

Forward Citations = 547(Granted Patents)


Location History:

  • Itami, JP (1996 - 1997)
  • Hyogo-ken, JP (1997 - 1999)
  • Hyogo, JP (1990 - 2006)
  • Tokyo, JP (1980 - 2023)

Company Filing History:

goldMedal21 out of 21,351 
 
Mitsubishi Denki Kabushiki Kaisha
 patents
silverMedal6 out of 3,781 
 
Renesas Technology Corp.
 patents
bronzeMedal4 out of 7,654 
 
Renesas Electronics Corporation
 patents
4. 1 out of 70 
 
Daiichi Seiyaku Co., Ltd.
 patents
5. 1 out of 1 
 
Nihon Tokusan Kabushiki Kaisha
 patent

Years Active: 1980-2023

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Areas of Expertise:
Semiconductor Device
Integrated Circuit
Memory Module
Dynamic Memory
Logic Blocks
Test Circuit
Data Storage
Refresh Interval
Scan Path
Circuit Design
Synchronous Transfer
Programmable Logic
33 patents (USPTO):Explore Patents
1. 11568908 - Semiconductor device for detecting failure in address decoder (2023-01-31),
2. 10552261 - Semiconductor device and memory module (2020-02-04),
3. 10490262 - Semiconductor device (2019-11-26),
4. 10109337 - Memory macro and semiconductor integrated circuit device (2018-10-23),
5. 7197693 - Connection verification apparatus for verifying interconnection between multiple logic blocks (2007-03-27),
6. 7139208 - Refresh-free dynamic semiconductor memory device (2006-11-21),
7. 7132850 - Semiconductor integrated circuit and circuit design apparatus (2006-11-07),
8. 7003622 - Semiconductor memory (2006-02-21),
9. 6934918 - IP (Intellectual Property) generating system (2005-08-23),
10. 6925022 - Refresh-free dynamic semiconductor memory device (2005-08-02),
11. 6539511 - Semiconductor integrated circuit devices with test circuit (2003-03-25),
12. 6449204 - DYNAMIC SEMICONDUCTOR MEMORY DEVICE CAPABLE OF REARRANGING DATA STORAGE FROM A ONE BIT/ONE CELL SCHEME IN A NORMAL MODE TO A ONE BIT/TWO CELL SCHEME IN A TWIN-CELL MODE FOR LENGTHENING A REFRESH INTERVAL (2002-09-10),
13. 6259639 - Semiconductor integrated circuit device capable of repairing defective parts in a large-scale memory (2001-07-10),
14. 5970096 - Synchronous serial transfer apparatus and synchronous serial transfer (1999-10-19),
15. 5911039 - Integrated circuit device comprising a plurality of functional modules (1999-06-08),

Title: Innovations of Takeshi Hashizume: A Semiconductor Expert

Introduction

Takeshi Hashizume, an accomplished inventor based in Tokyo, Japan, has made significant contributions to the field of semiconductor technology. With a remarkable portfolio of 33 patents, his innovative work has enhanced the efficiency and reliability of semiconductor devices.

Latest Patents

Among his latest patents, Hashizume developed a **semiconductor device for detecting failure in address decoder**. This innovative device includes a memory array arranged in a matrix, a plurality of word lines corresponding to memory cell rows, and a word driver for managing these lines. Additionally, it features a row decoder that outputs a select signal based on input row address information, allowing for the simple detection of address decoder failures.

Another notable patent is the **semiconductor device and memory module**. This invention utilizes a selection decoder to control multiple selection signals based on address bits. The memory module can then be selected when its corresponding signal is activated, enabling efficient reading and writing of data. The device also includes a failure determination unit that assesses the operational status of the selection decoder.

Career Highlights

Hashizume's professional journey has seen him work with renowned technology companies such as Mitsubishi Electric Corporation and Renesas Technology Corporation. His experience in these leading firms has significantly shaped his expertise in semiconductor design and innovation.

Collaborations

Throughout his career, Hashizume has collaborated with other talented engineers, including Kazuhiro Sakashita and Tatsunori Komoike. These collaborations have fostered a creative environment that has led to the development of cutting-edge technologies and solutions in the semiconductor sector.

Conclusion

Takeshi Hashizume's innovative spirit and commitment to excellence in semiconductor technology are reflected in his extensive patent portfolio. His work continues to impact the industry, paving the way for advancements that enhance the performance and reliability of electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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