The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2007
Filed:
Jan. 28, 2003
Takeshi Hashizume, Tokyo, JP;
Takeshi Hashizume, Tokyo, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
A connection verification apparatus verifies interconnection between a plurality of logic blocks constituting a semiconductor integrated circuit or the like. It includes a connection verification section for verifying interconnection between a first logic block and a second logic block by comparing a signal level of an output terminal of the first logic block with a signal level of an input terminal of the second logic block connected to the output terminal of the first logic block. The connection verification apparatus can verify the interconnection between the two logic blocks without verifying the logic processing to the two logic blocks.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile