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For the Inventor, By the Inventor

San Ramon, CA, United States of America

Seungpil Lee

This inventor holds 62 USPTO granted patents and 2 published patent applications and 5 EPO patents, primarily in Non-Volatile Memory (CPC class G11C). Top assignees: Sandisk Technologies Inc., Sandisk Corporation. Active years: 2007-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Seungpil Lee. Retrieved from https://idiyas.com/inventor/seungpil-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 62 

% Patents Active = 83.9

 

Average Co-Inventor Count = 4.2

ph-index = 12

Forward Citations = 618(Granted Patents)

Forward Citations (Not Self Cited) = 555(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal40 out of 4,995 
 
Sandisk Technologies Inc.
 patents
silverMedal22 out of 1,339 
 
Sandisk Corporation
 patents

Years Active: 2007-2021

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Areas of Expertise:
Wafer Alignment
Sense Amplifier
NAND Memory
Programming Techniques
Bit Line Compensation
High-Endurance Storage
3D Memory
Fast Reading
Power-Saving Operations
Temperature Compensation
Data Redundancy
Compact Design
62 patents (USPTO):Explore Patents
1. 11031308 - Connectivity detection for wafer-to-wafer alignment and bonding (2021-06-08),
2. 11024392 - Sense amplifier for bidirectional sensing of memory cells of a non-volatile memory (2021-06-01),
3. 10304550 - Sense amplifier with negative threshold sensing for non-volatile memory (2019-05-28),
4. 9947407 - Techniques for programming of select gates in NAND memory (2018-04-17),
5. 9881676 - Sense amplifier with program biasing and fast sensing (2018-01-30),
6. 9659656 - Techniques for programming of select gates in NAND memory (2017-05-23),
7. 9633742 - Segmentation of blocks for faster bit line settling/recovery in non-volatile memory devices (2017-04-25),
8. 9558836 - Compact high speed sense amplifier for non-volatile memory with reduced layout area and power consumption (2017-01-31),
9. 9361986 - High endurance non-volatile storage (2016-06-07),
10. 9318206 - Selective word line erase in 3D non-volatile memory (2016-04-19),
11. 9305648 - Techniques for programming of select gates in NAND memory (2016-04-05),
12. 9293195 - Compact high speed sense amplifier for non-volatile memory (2016-03-22),
13. 9230656 - System for maintaining back gate threshold voltage in three dimensional NAND memory (2016-01-05),
14. 9218890 - Adaptive operation of three dimensional memory (2015-12-22),
15. 9183086 - Selection of data for redundancy calculation in three dimensional nonvolatile memory (2015-11-10),

Title: Seungpil Lee: Pioneering Inventor from San Ramon

Introduction: Seungpil Lee is a distinguished inventor hailing from San Ramon, California. His innovative spirit and dedication to technological advancements have made him a prominent figure in the world of patents and inventions.

Latest Patents: Seungpil Lee holds several groundbreaking patents in various fields, including technology, healthcare, and consumer electronics. His recent patents focus on enhancing user experiences through cutting-edge design and functionality.

Career Highlights: Throughout his illustrious career, Seungpil Lee has consistently pushed the boundaries of innovation. His work has been recognized globally for its impact on improving everyday life and driving progress in multiple industries.

Collaborations: Seungpil Lee has collaborated with leading companies, research institutions, and universities to bring his inventions to life. His partnerships have been instrumental in transforming his visionary ideas into tangible products that benefit society.

Conclusion: Seungpil Lee's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors. His contributions to the world of patents and inventions have left an indelible mark on the technological landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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