Tokyo, Japan

Satoru Katsurayama

This inventor holds 11 USPTO granted patents and 6 published patent applications and 1 EPO patent. Top assignees: Sumitomo Bakelite Company Limited, International Business Machines Corporation, Disco Corporation. Active years: 2010-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Satoru Katsurayama. Retrieved from https://idiyas.com/inventor/satoru-katsurayama

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 11 

% Patents Active = 9.1

 

Average Co-Inventor Count = 3.4

ph-index = 5

Forward Citations = 56(Granted Patents)


Location History:

  • Tochigi Prefecture, JP (2011)
  • Tokyo, JP (2010 - 2014)
  • Utsunomiya, JP (2011 - 2014)

Company Filing History:


Years Active: 2010-2014

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11 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Satoru Katsurayama

Introduction

Satoru Katsurayama, an accomplished inventor based in Tokyo, Japan, has made significant strides in the field of semiconductor technology. With a remarkable portfolio of 11 patents, Satoru's work reflects his dedication to advancing innovation in electronics.

Latest Patents

One of Satoru's latest patents details a groundbreaking semiconductor device. This device features a first substrate on which a first semiconductor chip is mounted, along with a second substrate housing a second semiconductor chip. It includes connecting sections that facilitate electrical connections between the two substrates. Unique to this design are build-up layers A and B within the first substrate—each consisting of alternating insulating layers containing resin and conductor interconnect layers that are interconnected by a conductive layer in via holes of the insulating layers. Notably, these substrates are designed to have an average coefficient of thermal expansion of 35 ppm/degree Celsius or less, ensuring stability and durability.

Another of his recent patents addresses wafer dicing employing edge region underfill removal. This innovative approach includes the laser grooving of a dielectric material layer that embeds metal structures in the chip-containing substrate. The process aligns the blade for dicing while also simplifying underfill layer application. This method enhances the efficiency and precision of the dicing process—critical components in semiconductor manufacturing.

Career Highlights

Throughout his career, Satoru has worked with renowned companies, including Sumitomo Bakelite Company Limited and IBM. His contributions in these organizations have been pivotal in shaping advancements in semiconductor technologies. By leveraging his expertise and innovative mindset, he continues to push the boundaries of what is possible in electronics.

Collaborations

Satoru has collaborated with distinguished colleagues such as Tomoe Yamashiro and Mitsuo Sugino. Together, they have contributed to the development of various technologies, showcasing the power of teamwork in fostering innovation.

Conclusion

Satoru Katsurayama stands as a testament to the impact of inventiveness in the tech industry. With his impressive array of patents and collaboration with esteemed colleagues, he continues to drive progress in semiconductor technology. His work not only reflects his talent as an inventor but also contributes meaningfully to the field, influencing future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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