logo

For the Inventor, By the Inventor

San Jose, CA, United States of America

Satheesh Kuppurao

This inventor holds 38 USPTO granted patents and 13 published patent applications and 1 EPO patent, primarily in Semiconductor Processing. Top assignees: Applied Materials, Inc., Applied Material, Inc., Other. Active years: 2000-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Satheesh Kuppurao. Retrieved from https://idiyas.com/inventor/satheesh-kuppurao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 38 

% Patents Active = 68.4

 

Average Co-Inventor Count = 4.8

ph-index = 8

Forward Citations = 821(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2000 - 2001)
  • Santa Clara., CA (US) (2002)
  • San Jose, CA (US) (2007 - 2019)

Company Filing History:

goldMedal36 out of 14,482 
 
Applied Materials, Inc.
 patents
silverMedal1 out of 23 
 
Applied Material, Inc.
 patents
bronzeMedal1 out of 834,570 
Other
 patents

Years Active: 2000-2019

Loading Chart...
Loading Chart...
Areas of Expertise:
Chemical Vapor Deposition
Epitaxial Deposition
Substrate Processing
Temperature Management
Reactive Etch
Insitu Analysis
Film Deposition
Contamination Control
Silicon Films
Low Temperature Growth
Radiant Gas Preheating
Layer Deposition
38 patents (USPTO):Explore Patents
1. 10458040 - Upper dome with injection assembly (2019-10-29),
2. 10312096 - [object Object] (2019-06-04),
3. 10306708 - Absorbing reflector for semiconductor processing chamber (2019-05-28),
4. 10224421 - Self-aligned process for sub-10nm fin formation (2019-03-05),
5. 10202707 - Substrate processing system with lamphead having temperature management (2019-02-12),
6. 10119192 - EPI base ring (2018-11-06),
7. 10077508 - Multizone control of lamps in a conical lamphead using pyrometers (2018-09-18),
8. 9870919 - Process chamber having separate process gas and purge gas regions (2018-01-16),
9. 9845550 - Upper dome with injection assembly (2017-12-19),
10. 9842753 - Absorbing lamphead face (2017-12-12),
11. 9832816 - Absorbing reflector for semiconductor processing chamber (2017-11-28),
12. 9768043 - Quartz upper and lower domes (2017-09-19),
13. 9580835 - Multizone control of lamps in a conical lamphead using pyrometers (2017-02-28),
14. 9512520 - Semiconductor substrate processing system (2016-12-06),
15. 9322097 - EPI base ring (2016-04-26),

Title: The Innovator Profile: Satheesh Kuppurao

Introduction:

Satheesh Kuppurao is a prolific inventor based in San Jose, CA, with an impressive portfolio of 38 patents. His innovative work has significantly contributed to advancements in semiconductor processing technologies.

Latest Patents:

1. "Upper dome with injection assembly" - Kuppurao's invention focuses on an apparatus for delivering gas to a semiconductor processing chamber. This technology enables precise delivery of precursor gases to enhance the manufacturing process.

2. "Selective formation of titanium silicides on substrates" - This patent highlights methods for selectively forming titanium silicides on substrates, crucial for contact structure integration schemes in semiconductor processing.

Career Highlights:

Kuppurao has made remarkable contributions while working at Applied Materials, Inc., a prominent player in the semiconductor industry. His expertise in developing cutting-edge technologies has led to the successful implementation of numerous inventions in the field.

Collaborations:

Throughout his career, Kuppurao has collaborated with talented individuals such as David K Carlson and Paul Brillhart. These collaborations have fostered creativity and innovation, resulting in groundbreaking solutions for complex technological challenges.

Conclusion:

Satheesh Kuppurao's dedication to innovation and his profound impact on semiconductor processing technologies solidify his position as a trailblazer in the industry. With a strong track record of patents and a collaborative spirit, he continues to drive advancements that shape the future of the semiconductor landscape.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…