Ramesh C Tekumalla

USPTO Granted Patents = 22 (Patent Applications = 9)

EPO Patents = 2 (Patent Applications = 2)

Average Co-Inventor Count = 1.8

ph-index = 5

Forward Citations = 78(Granted Patents)

Location History:

Breinigsville, PA (US) (2013 - 2016)
Breinisgsville, PA (US) (2016)

Company Filing History:

Avago Technologies General IP (singapore) Pte. Ltd.

patents

Years Active: 2013-2016

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22 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9348593 - Instruction address encoding and decoding based on program construct groups (2016-05-24),

2. 9251916 - Integrated clock architecture for improved testing (2016-02-02),

3. 8924801 - At-speed scan testing of interface functional logic of an embedded memory or other circuit core (2014-12-30),

4. 8904255 - Integrated circuit having clock gating circuitry responsive to scan shift control signal (2014-12-02),

5. 8898527 - At-speed scan testing of clock divider logic in a clock module of an integrated circuit (2014-11-25),

6. 8850280 - Scan enable timing control for testing of scan cells (2014-09-30),

7. 8826087 - Scan circuitry for testing input and output functional paths of an integrated circuit (2014-09-02),

8. 8819508 - Scan test circuitry configured to prevent violation of multiplexer select signal constraints during scan testing (2014-08-26),

9. 8812921 - Dynamic clock domain bypass for scan chains (2014-08-19),

10. 8799731 - Clock control for reducing timing exceptions in scan testing of an integrated circuit (2014-08-05),

11. 8793546 - Integrated circuit comprising scan test circuitry with parallel reordered scan chains (2014-07-29),

12. 8788896 - Scan chain lockup latch with data input control responsive to scan enable signal (2014-07-22),

13. 8751884 - Scan test circuitry with selectable transition launch mode (2014-06-10),

14. 8738978 - Efficient wrapper cell design for scan testing of integrated (2014-05-27),

15. 8726108 - Scan test circuitry configured for bypassing selected segments of a multi-segment scan chain (2014-05-13),

Title: Ramesh C. Tekumalla: Innovator in Instruction Address Encoding and Integrated Clock Architecture

Introduction: Ramesh C. Tekumalla, a renowned inventor based in Breinigsville, Pennsylvania, has made significant contributions to the field of computer systems and integrated circuits. With a total of 22 patents to his name, Tekumalla’s innovations have focused on enhancing the efficiency and functionality of digital processing.

Latest Patents: Among his latest patents, Tekumalla has developed a method for instruction address encoding and decoding based on program construct groups. This technology enables a coding circuitry configuration where an encoder identifies and encodes an instruction address as part of a distinct program construct group. The decoder then translates the encoded address based on its group affiliation, streamlining processes in integrated circuits and other processing devices.

Another noteworthy patent from Tekumalla is his integrated clock architecture for improved testing. This innovation involves a computer system featuring dual on-chip controllers operating in different clock domains during normal operation. During testing, a control element generates synchronized clock signals for both controllers, thus enhancing the efficiency of testing procedures while minimizing power draw.

Career Highlights: Ramesh C. Tekumalla has collaborated with several prominent companies throughout his career. He has held positions at LSI Corporation and Avago Technologies, among others. His ability to innovate and push boundaries in technology has made him a respected figure in the industry.

Collaborations: Tekumalla's collaborative efforts extend to working with experienced professionals, including notable colleagues like Prakash Krishnamoorthy and Priyesh Kumar. Together, they have contributed to various advancements in their field.

Conclusion: Ramesh C. Tekumalla exemplifies the spirit of innovation in the technology sector. His patents not only reflect his ingenuity but also demonstrate a commitment to improving the capabilities of modern computing systems. His work continues to influence future developments in integrated circuit design and digital processing technologies.

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