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For the Inventor, By the Inventor

Karnataka, India

Rajesh N Gupta

USPTO Granted Patents = 28 

Average Co-Inventor Count = 2.2

ph-index = 6

Forward Citations = 149(Granted Patents)


Location History:

  • Mountain View, CA (US) (2008 - 2012)
  • Alviso, CA (US) (2013 - 2016)
  • Devarabisnahalli, IN (2016 - 2019)
  • Karnataka, IN (2014 - 2022)
  • Bengaluru, IN (2022)

Company Filing History:

goldMedal23 out of 37,972 
 
Micron Technology Incorporated
 patents
silverMedal5 out of 58 
 
T-ram Semiconductor, Inc.
 patents

Years Active: 2008-2025

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28 patents (USPTO):Explore Patents
1. 12260092 - Systems and methods for generating logical-to-physical tables for wear-leveling (2025-03-25),
2. 11442631 - Memory operations with consideration for wear leveling (2022-09-13),
3. 11302703 - Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages (2022-04-12),
4. 10914780 - Methods and apparatuses for threshold voltage measurement and related semiconductor devices and systems (2021-02-09),
5. 10886273 - Gated bipolar junction transistors, memory arrays, and methods of forming gated bipolar junction transistors (2021-01-05),
6. 10607988 - Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages (2020-03-31),
7. 10381357 - Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages (2019-08-13),
8. 10373956 - Gated bipolar junction transistors, memory arrays, and methods of forming gated bipolar junction transistors (2019-08-06),
9. 10242738 - Resistance variable element methods and apparatuses (2019-03-26),
10. 9842649 - Resistance variable element methods and apparatuses (2017-12-12),
11. 9761590 - Passing access line structure in a memory device (2017-09-12),
12. 9691465 - Thyristors, methods of programming thyristors, and methods of forming thyristors (2017-06-27),
13. 9577092 - Apparatuses having a vertical memory cell (2017-02-21),
14. 9520447 - Memory cells having a common gate terminal (2016-12-13),
15. 9384814 - Thyristor memory and methods of operation (2016-07-05),

As an AI assistant specializing in innovations, inventions, inventors, patent attorneys, assignees, and patents, I can provide you with an article about inventor Rajesh N Gupta based on the data you have provided.

Title: The Inventor Spotlight: Rajesh N Gupta

Introduction: Rajesh N Gupta is a prolific inventor based in Karnataka, India, with an impressive portfolio of 27 patents to his name. His groundbreaking work in memory operations and semiconductor technology has garnered widespread acclaim in the innovation community.

Latest Patents:

1. *Memory operations with consideration for wear leveling:* In this patent, Gupta introduces an apparatus that optimizes memory usage by adjusting access patterns based on wear leveling considerations. This innovation underscores Gupta's expertise in enhancing memory controller efficiency.

2. *Apparatuses having memory cells with two transistors and one capacitor:* Gupta's invention of a memory cell with specific transistor and capacitor configurations showcases his ingenuity in semiconductor design. The incorporation of different reference voltages in the memory cell further highlights his attention to detail.

Career Highlights: Gupta has made significant contributions to renowned companies such as Micron Technology Incorporated and T-RAM Semiconductor, Inc. His innovative spirit and technical prowess have been instrumental in advancing the semiconductor industry.

Collaborations: Throughout his career, Gupta has collaborated closely with esteemed professionals like Farid Nemati and Scott T Robins. These fruitful partnerships have led to the development of cutting-edge technologies and the successful implementation of novel concepts.

Conclusion: In conclusion, Rajesh N Gupta stands out as a visionary inventor who continues to push the boundaries of innovation in the field of semiconductor technology. His impressive patent portfolio and collaborative efforts underscore his commitment to driving progress and shaping the future of memory operations.

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