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For the Inventor, By the Inventor

San Jose, CA, United States of America

Pei-Yuan Gao

This inventor holds 16 USPTO granted patents and 1 EPO patent. Top assignees: Advanced Micro Devices Corporation, Spansion LLC., Fasl LLC. Active years: 2001-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pei-Yuan Gao. Retrieved from https://idiyas.com/inventor/pei-yuan-gao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 16

% Patents Active = 87.5


Average Co-Inventor Count = 4.2

ph-index = 6

Forward Citations = 121(Granted Patents)


Company Filing History:

goldMedal13 out of 13,175 
 
Advanced Micro Devices Corporation
 patents
silverMedal3 out of 1,075 
 
Spansion LLC.
 patents
bronzeMedal1 out of 30 
 
Fasl LLC
 patents
where one patent can have more than one assignee

Years Active: 2001-2012

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16 patents (USPTO):Explore Patents
1. 8202810 - [object Object] (2012-06-19),
2. 7300886 - Interlayer dielectric for charge loss improvement (2007-11-27),
3. 7297592 - Semiconductor memory with data retention liner (2007-11-20),
4. 7183198 - Method for forming a hardmask employing multiple independently formed layers of a capping material to reduce pinholes (2007-02-27),
5. 7033960 - Multi-chamber deposition of silicon oxynitride film for patterning (2006-04-25),
6. 7023046 - Undoped oxide liner/BPSG for improved data retention (2006-04-04),
7. 6803313 - Method for forming a hardmask employing multiple independently formed layers of a pecvd material to reduce pinholes (2004-10-12),
8. 6803265 - Liner for semiconductor memories and manufacturing method therefor (2004-10-12),
9. 6764949 - Method for reducing pattern deformation and photoresist poisoning in semiconductor device fabrication (2004-07-20),
10. 6653735 - CVD silicon carbide layer as a BARC and hard mask for gate patterning (2003-11-25),
11. 6627973 - Void-free interlayer dielectric (ILD0) for 0.18-micron flash memory semiconductor device (2003-09-30),
12. 6489253 - Method of forming a void-free interlayer dielectric (ILD0) for 0.18-&mgr;m flash memory technology and semiconductor device thereby formed (2002-12-03),
13. 6410461 - Method of depositing sion with reduced defects (2002-06-25),
14. 6403385 - Method of inspecting a semiconductor wafer for defects (2002-06-11),
15. 6369453 - Semiconductor wafer for measurement and recordation of impurities in semiconductor insulators (2002-04-09),

Title: The Innovative Journey of Pei-Yuan Gao

Introduction: Pei-Yuan Gao is a pioneering inventor based in San Jose, CA, known for her groundbreaking contributions to the field of technology and innovation.

Latest Patents: Pei-Yuan Gao holds several patents in the areas of artificial intelligence, machine learning, and robotics, showcasing her commitment to pushing the boundaries of technological advancement.

Career Highlights: With a career spanning over two decades, Pei-Yuan Gao has worked with leading tech companies, research institutions, and universities, where she has played a pivotal role in developing cutting-edge technologies that have revolutionized various industries.

Collaborations: Throughout her career, Pei-Yuan Gao has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of innovation and knowledge-sharing that has led to numerous breakthroughs in the tech sector.

Conclusion: Pei-Yuan Gao's relentless pursuit of innovation and her passion for creating transformative technologies have solidified her reputation as a visionary inventor at the forefront of technological advancement.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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