The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2002

Filed:

May. 07, 2001
Applicant:
Inventors:

Pei-Yuan Gao, San Jose, CA (US);

Minh Van Ngo, Fremont, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1469 ;
U.S. Cl.
CPC ...
H01L 2/1469 ;
Abstract

Silicon oxynitride layers are deposited by plasma enhanced chemical vapor deposition with significantly reduced defects, such as nodules, employing a ramp down step at the end of the deposition cycle. Embodiments include depositing a SION ARC at a first power, discontinuing the flow of SiH and ramping down to a second power while continuing the flow of N O and N , and ramping down to a third power while continuing the flow of N and N before pumping down. The resulting relatively defect free silicon oxynitride layers can be advantageously employed as an ARC, particularly when patterning contact holes in manufacturing flash memory devices.


Find Patent Forward Citations

Gao, Pei-Yuan. (2002). Method of depositing sion with reduced defects (U.S. Patent No. 6410461). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6410461

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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