Kyoung Bong Rouh

This inventor holds 30 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Fabrication. Top assignees: Hynix Semiconductor Inc., Skhynix Inc.. Active years: 2006-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kyoung Bong Rouh. Retrieved from https://idiyas.com/inventor/kyoung-bong-rouh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 30 (Patent Applications = 2)

% Patents Active = 36.7

Average Co-Inventor Count = 2.2

ph-index = 5

Forward Citations = 145(Granted Patents)

Location History:

Kyoungki-do, KR (2006)
Gyeonggi-do, KR (2009)
Gyunggi-do, KR (2007 - 2010)
Goyang-si, KR (2008 - 2014)
Icheon-si, KR (2010 - 2014)

Company Filing History:

28 out of 6,228

Hynix Semiconductor Inc.

Years Active: 2006-2014

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Areas of Expertise:

MOS Transistor

Short Channel Effect

Ion Implantation

Dual Gate Structure

P-Type Impurity

Thermal Treatment

Recess Gate

Asymmetric Junction

Semiconductor Memory

Doping Concentration

Partial Ion Implantation

Non-Uniform Energy

30 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8803224 - MOS transistor suppressing short channel effect and method of fabricating the same (2014-08-12),

2. 8703564 - Method for manufacturing a transistor for preventing or reducing short channel effect (2014-04-22),

3. 8343859 - Non-uniform ion implantation apparatus and method thereof (2013-01-01),

4. 8324099 - Method of fabricating a landing plug in a semiconductor device (2012-12-04),

5. 8110501 - Method of fabricating landing plug with varied doping concentration in semiconductor device (2012-02-07),

6. 8003501 - Method of doping P-type impurity ions in dual poly gate and method of forming dual poly gate using the same (2011-08-23),

7. 7968857 - Apparatus and method for partial ion implantation using atom vibration (2011-06-28),

8. 7955074 - Apparatus and method for thermally treating semiconductor device capable of preventing wafer from warping (2011-06-07),

9. 7947559 - Method of fabricating semiconductor device (2011-05-24),

10. 7939418 - Partial implantation method for semiconductor manufacturing (2011-05-10),

11. 7935591 - Method for fabricating PMOS transistor and method for forming dual gate using the same (2011-05-03),

12. 7824975 - Method of fabricating semiconductor device having gate spacer layer with uniform thickness (2010-11-02),

13. 7790551 - Method for fabricating a transistor having a recess gate structure (2010-09-07),

14. 7785945 - Method for fabricating PMOS transistor (2010-08-31),

15. 7700442 - Semiconductor device having a recessed gate and asymmetric dopant regions and method of manufacturing the same (2010-04-20),

Title: Inventor Kyoung Bong Rouh

Introduction: Kyoung Bong Rouh is a renowned inventor hailing from Goyang-si, South Korea. He has made significant contributions to the field of innovation with his groundbreaking ideas and inventions.

Latest Patents: Kyoung Bong Rouh holds several patents in various industries, including technology, healthcare, and consumer goods. His latest patents focus on sustainable energy solutions and advanced medical devices.

Career Highlights: Throughout his career, Kyoung Bong Rouh has been recognized for his innovative thinking and problem-solving skills. He has received numerous awards for his inventions and has been invited to speak at prestigious conferences around the world.

Collaborations: Kyoung Bong Rouh has collaborated with leading companies and research institutions to bring his inventions to life. His partnerships have led to the development of cutting-edge products that have had a positive impact on society.

Conclusion: In conclusion, Kyoung Bong Rouh is a visionary inventor who continues to push the boundaries of innovation. His passion for creating solutions to complex problems has solidified his reputation as a trailblazer in the world of inventions.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

2 patents pending: