Tokyo, Japan

Katsuyuki Horita

This inventor holds 47 USPTO granted patents and 3 published patent applications, primarily in Semiconductor Devices. Top assignees: Mitsubishi Denki Kabushiki Kaisha, Renesas Electronics Corporation, Renesas Technology Corp.. Active years: 1999-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Katsuyuki Horita. Retrieved from https://idiyas.com/inventor/katsuyuki-horita

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 47 

% Patents Active = 72.3

Average Co-Inventor Count = 3.2

ph-index = 12

Forward Citations = 366(Granted Patents)


Location History:

  • Chiyoda-ku, JP (2005)
  • Tokyo, JP (1999 - 2013)
  • Kawasaki, JP (2014 - 2015)
  • Kanagawa, JP (2013 - 2016)

Company Filing History:


Years Active: 1999-2016

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Areas of Expertise:
Semiconductor Device
Isolation Film
Trench Isolation
Integrated Circuit
Manufacturing Method
Doped Channel
Epitaxial Semiconductor
Element Isolation
Impurity Layer
SOI SRAM
Wiring Delay
Gate Electrode
47 patents (USPTO):Explore Patents

Title: **The Innovative Mind of Katsuyuki Horita**

Introduction

Katsuyuki Horita, based in Tokyo, Japan, is a renowned inventor with an impressive portfolio of 47 patents. His contributions to the field of semiconductor technology have significantly advanced the development and manufacturing of electronic devices.

Latest Patents

Horita's recent inventions showcase his ingenuity and dedication to improving semiconductor devices. One of his notable patents is a semiconductor device and method of manufacturing it, aimed at enhancing the characteristics of semiconductor devices. This invention features a Metal-Insulator-Semiconductor Field-Effect Transistor (MISFET) arranged in an active region surrounded by an element isolation region, with an insulating layer placed beneath the active region. It incorporates both p-type and n-type semiconductor regions to optimize conductivity and performance.

Another significant patent involves a semiconductor device that includes an isolation film buried within a groove. This design is implemented on a Silicon-On-Insulator (SOI) substrate, featuring a supporting substrate, a buried oxide film (BOX layer), and an SOI layer. A first MISFET is formed on the SOI layer, while an isolation groove is strategically integrated to enhance device performance and reliability.

Career Highlights

Throughout his career, Katsuyuki Horita has worked with leading companies, including Mitsubishi Electric Corporation and Renesas Electronics Corporation. His experience in these organizations has allowed him to pioneer advancements in semiconductor technology, paving the way for enhanced electronic components utilized in various applications.

Collaborations

Among his accomplished coworkers are Takashi Kuroi and Maiko Sakai, who have collaborated with Horita on several innovative projects, further demonstrating the importance of teamwork in the realm of invention and innovation.

Conclusion

Katsuyuki Horita stands as a prominent figure in the field of semiconductor technology, with his extensive patent portfolio emphasizing his commitment to innovation. His work continues to inspire future inventors and contributes significantly to the evolution of electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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