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For the Inventor, By the Inventor

Hwaseong, South Korea

Jong-Ryun Choi

This inventor holds 15 USPTO granted patents and 1 published patent application. Top assignees: Samsung Electronics Co., Ltd., Yonsei University. Active years: 2011-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jong-Ryun Choi. Retrieved from https://idiyas.com/inventor/jong-ryun-choi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15 

% Patents Active = 93.3

Average Co-Inventor Count = 3.8

ph-index = 4

Forward Citations = 37(Granted Patents)


Location History:

  • Hwasung-si, KR (2011 - 2012)
  • Hwaseong-si, KR (2011 - 2022)

Company Filing History:

goldMedal15 out of 132,108 
 
Samsung Electronics Co., Ltd.
 patents
silverMedal2 out of 1,486 
 
Yonsei University
 patents
where one patent can have more than one assignee

Years Active: 2011-2022

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15 patents (USPTO):Explore Patents
1. 11381231 - Digital measurement circuit and memory system using the same (2022-07-05),
2. 10977412 - Integrated circuit including load standard cell and method of designing the same (2021-04-13),
3. 10840896 - Digital measurement circuit and memory system using the same (2020-11-17),
4. 10756059 - Semiconductor chip including a plurality of pads (2020-08-25),
5. 10572406 - Memory controller for receiving differential data strobe signals and application processor having the memory controller (2020-02-25),
6. 10115706 - Semiconductor chip including a plurality of pads (2018-10-30),
7. 10073619 - Interface circuits configured to interface with multi-rank memory (2018-09-11),
8. 9859880 - Delay cell and delay line having the same (2018-01-02),
9. 9857973 - Interface circuits configured to interface with multi-rank memory (2018-01-02),
10. 8766691 - Duty cycle error accumulation circuit and duty cycle correction circuit having the same (2014-07-01),
11. 8493116 - Clock delay circuit and delay locked loop including the same (2013-07-23),
12. 8283958 - Delay-locked loop and electronic device including the same (2012-10-09),
13. 8049543 - Delay locked loop, electronic device including the same, and method of operating the same (2011-11-01),
14. 7994835 - Duty control circuit and semiconductor device having the same (2011-08-09),
15. 7990195 - Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes (2011-08-02),

Title: Jong-Ryun Choi: Innovator from Hwaseong-si, KR

Introduction: Jong-Ryun Choi is a renowned inventor hailing from Hwaseong-si, South Korea, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Jong-Ryun Choi holds several patents in the areas of electronics, telecommunications, and renewable energy, showcasing his diverse expertise and innovative mindset.

Career Highlights: With a career spanning over two decades, Choi has worked with leading tech companies, research institutions, and universities, playing a pivotal role in developing cutting-edge technologies that have revolutionized various industries.

Collaborations: Throughout his career, Jong-Ryun Choi has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of innovation and knowledge exchange to drive progress in the field of technology.

Conclusion: Jong-Ryun Choi's passion for innovation, coupled with his relentless pursuit of excellence, has solidified his reputation as a visionary inventor, shaping the future of technology and inspiring the next generation of innovators.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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