The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2018
Filed:
Dec. 14, 2017
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventors:
Kwanyeob Chae, Hwaseong-si, KR;
Yoonjee Nam, Daejeon, KR;
Ji Hun Oh, Hwaseong-si, KR;
Shinyoung Yi, Seoul, KR;
Jong-Ryun Choi, Hwaseong-si, KR;
Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G11C 7/10 (2006.01); G11C 8/12 (2006.01); G06F 13/40 (2006.01); G11C 5/04 (2006.01); G06F 13/16 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0601 (2013.01); G06F 13/4072 (2013.01); G11C 7/1078 (2013.01); G11C 7/1093 (2013.01); G11C 8/12 (2013.01); G06F 3/0683 (2013.01); G06F 12/0238 (2013.01); G06F 13/1678 (2013.01); G06F 13/1689 (2013.01); G11C 5/04 (2013.01);
Abstract
An interface circuit may include a first FIFO circuit and a second FIFO circuit. The first FIFO circuit may generate first output data based on a first sampling signal and a second sampling signal. The second FIFO circuit may generate second output data based on a third sampling signal and a fourth sampling signal. The first FIFO circuit and the second FIFO circuit may be cross-reset.