The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2011
Filed:
Sep. 22, 2009
Kwan-yeob Chae, Seoul, KR;
Su-ho Kim, Yongin-si, KR;
Won Lee, Gunpo-si, KR;
Sang-hoon Joo, Yongin-si, KR;
Dharmendra Pandit, Yongin-si, KR;
Jong-ryun Choi, Hwaseong-si, KR;
Kwan-yeob Chae, Seoul, KR;
Su-ho Kim, Yongin-si, KR;
Won Lee, Gunpo-si, KR;
Sang-hoon Joo, Yongin-si, KR;
Dharmendra Pandit, Yongin-si, KR;
Jong-ryun Choi, Hwaseong-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Abstract
A duty control circuit including a clock input unit connected to a first node and a second node, the clock input unit receiving an input clock signal through the first node and changing a voltage of the second node to one of a first voltage level and a second voltage level in response to respective low and high logic levels of the input clock signal, a slew controller connected to the second node, the slew controller including one or more switches controlled by respective control signals, the one or more switches providing one of the first voltage level and the second voltage level to the second node in response to the control signals such that a slew rate of a signal at the second node is varied, and a clock output unit, the clock output unit outputting an output clock signal having a duty that varies.