The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2020

Filed:

Oct. 11, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Kwanyeob Chae, Hwaseong-si, KR;

Sanghoon Joo, Osan-si, KR;

Jong-Ryun Choi, Hwaseong-si, KR;

Jin-Ho Choi, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/50 (2006.01); H01L 23/58 (2006.01); H01L 23/60 (2006.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/50 (2013.01); H01L 23/5286 (2013.01); H01L 23/585 (2013.01); H01L 23/60 (2013.01); H01L 24/00 (2013.01); H01L 24/02 (2013.01); H01L 23/5221 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 2224/0233 (2013.01); H01L 2224/0235 (2013.01); H01L 2224/02375 (2013.01); H01L 2224/02377 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05552 (2013.01); H01L 2224/06131 (2013.01); H01L 2224/06135 (2013.01); H01L 2224/14131 (2013.01); H01L 2224/14135 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06555 (2013.01); H01L 2924/00012 (2013.01);
Abstract

A semiconductor chip including a plurality of input/output units includes: a plurality of additional pads disposed on a surface of the semiconductor chip, wherein the plurality of additional pads include at least one of a first additional pad to which a ground voltage is applied and a second additional pad to which a power supply voltage is applied; and a plurality of pads disposed on the surface of the semiconductor chip, wherein the plurality of pads include at least one of a first pad to which the ground voltage is applied and a second pad to which the power supply voltage is applied, and further include a third pad through which a signal is input and/or output. The at least one of the first additional pad and the second additional pad is disposed on an input/output unit where the third pad is disposed, among the plurality of input/output units.


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