Fremont, CA, United States of America

Jing Ling

This inventor holds 26 USPTO granted patents and 3 published patent applications and 2 EPO patents, primarily in Memory Management. Top assignees: Intel Corporation, Micron Technology Incorporated, Other. Active years: 2005-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jing Ling. Retrieved from https://idiyas.com/inventor/jing-ling

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 26 

% Patents Active = 61.5

 

Average Co-Inventor Count = 4.2

ph-index = 6

Forward Citations = 85(Granted Patents)


Location History:

  • Fremont, CA (US) (2005 - 2016)
  • Milpitas, CA (US) (2017 - 2021)

Company Filing History:


Years Active: 2005-2026

Loading Chart...
Loading Chart...
Areas of Expertise:
Memory Transaction Queue
Error Correction
Data Corruption Detection
Memory Reliability
Dynamic Memory Allocation
Packet Flows
Virtual Output Queue
Bandwidth Management
Concurrent Processing
Data Flushing
Differential Delay Compensation
Rate Policing Algorithm
26 patents (USPTO):Explore Patents

Title: Innovations by Jing Ling: A Pioneer in Memory Error Correction

Introduction: Jing Ling, based in Fremont, CA, is an accomplished inventor known for his significant contributions to the field of memory error correction. With an impressive portfolio of 24 patents, Jing has honed his expertise in enhancing the reliability and serviceability of memory subsystems, making important strides in technology that benefit various applications.

Latest Patents: Jing Ling's latest patents represent groundbreaking advancements in memory technology. One notable patent is for a "Fast memory ECC error correction," which describes a memory controller equipped with error checking and correction (ECC) circuitry. This innovative design allows for the detection and correction of errors in data being read from memory through a retry flow, minimizing the need to resend read commands to memory. The read data is temporarily stored in a read data buffer (RDB) for efficiency. Jing's second significant patent, "Adaptive error correction to improve system memory reliability, availability, and serviceability (RAS)," outlines a memory subsystem that dynamically allocates space to enhance RAS. The system detects errors in memory devices and implements several measures to correct them, such as allocating spare memory or marking failed segments, ensuring reliable performance.

Career Highlights: Throughout his career, Jing Ling has collaborated with leading technology companies, notably with Intel Corporation and Micron Technology Incorporated. His work in these organizations has contributed to progressive developments in memory technology, establishing him as an influential figure in the industry.

Collaborations: Jing has collaborated with fellow innovators, including Juan-Carlos Calderon and Jean-Michel Caia. Working alongside these talented individuals has allowed Jing to further push the boundaries of memory error correction and develop solutions that address critical challenges in the field.

Conclusion: Jing Ling's achievements in the realm of memory error correction underscore his role as a significant inventor and innovator. His work continues to influence the development of more reliable and efficient memory systems, ensuring that technology meets the growing demands of modern applications. With a solid foundation of patents and a track record of collaboration, Jing is undoubtedly a key player in advancing memory technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…