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For the Inventor, By the Inventor

Taichung, Taiwan

Jeng-Yuan Lai

This inventor holds 9 USPTO granted patents. Top assignee: Siliconware Precision Industries Co., Ltd.. Active years: 2001-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeng-Yuan Lai. Retrieved from https://idiyas.com/inventor/jeng-yuan-lai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 9

% Patents Active = 77.8

Average Co-Inventor Count = 3.4

ph-index = 6

Forward Citations = 216(Granted Patents)


Location History:

  • Taichung, TW (2001 - 2006)
  • Taichung Hsien, TW (2007 - 2012)

Company Filing History:

goldMedal9 out of 826 
 
Siliconware Precision Industries Co., Ltd.
 patents

Years Active: 2001-2012

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9 patents (USPTO):Explore Patents
1. 8304665 - Package substrate having landless conductive traces (2012-11-06),
2. 8207620 - Flip-chip semiconductor package and chip carrier for preventing corner delamination (2012-06-26),
3. 7364948 - Method for fabricating semiconductor package (2008-04-29),
4. 7199453 - Semiconductor package and fabrication method thereof (2007-04-03),
5. 7019389 - Lead frame and semiconductor package with the same (2006-03-28),
6. 6650015 - Cavity-down ball grid array package with semiconductor chip solder ball (2003-11-18),
7. 6501164 - Multi-chip semiconductor package with heat dissipating structure (2002-12-31),
8. 6369455 - Externally-embedded heat-dissipating device for ball grid array integrated circuit package (2002-04-09),
9. 6246115 - Semiconductor package having a heat sink with an exposed surface (2001-06-12),

Title: Innovations of Jeng-Yuan Lai

Introduction

Jeng-Yuan Lai is a prominent inventor based in Taichung Hsien, Taiwan. He has made significant contributions to the field of semiconductor packaging, holding a total of nine patents. His work focuses on enhancing the reliability and performance of electronic components.

Latest Patents

One of his latest patents is for a package substrate having landless conductive traces. This innovative design includes a core layer with multiple plated through holes and conductive traces that improve the contact area between the traces and the holes, thereby preventing cracking. Another notable patent is for a flip-chip semiconductor package and chip carrier designed to prevent corner delamination. This invention features a groove around the chip-mounting area filled with a low Young's modulus filler, which absorbs thermal stress and enhances the durability of the assembly.

Career Highlights

Jeng-Yuan Lai is currently employed at Siliconware Precision Industries Co., Ltd., a leading company in the semiconductor industry. His expertise in packaging technology has positioned him as a key player in the development of advanced electronic solutions.

Collaborations

He has collaborated with talented coworkers, including Candy Tien and Chun-Lung Chen, contributing to various innovative projects within the company.

Conclusion

Jeng-Yuan Lai's contributions to semiconductor packaging technology demonstrate his commitment to innovation and excellence in the field. His patents reflect a deep understanding of the challenges in electronic component design and offer practical solutions to enhance performance and reliability.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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