The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2001

Filed:

Oct. 21, 1999
Applicant:
Inventors:

Tom Tang, ChangHwa Esien, TW;

Chien Ping Huang, Hsinchu Hsien, TW;

Kevin Chiang, Taichung Hsien, TW;

Jeng-Yuan Lai, Taichung, TW;

Candy Tien, Taichung Hsien, TW;

Vicky Liu, Pingtung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/310 ; H01L 2/302 ; H01L 2/312 ; H01L 2/334 ;
U.S. Cl.
CPC ...
H01L 2/310 ; H01L 2/302 ; H01L 2/312 ; H01L 2/334 ;
Abstract

An integrated circuit package with a fully-exposed heat sink is provided. The integrated circuit package includes a substrate having a first side being formed with first conductive traces and a second side being formed with second conductive traces. At least one chip is mounted on the substrate and electrically connected to the first conductive traces. A plurality of solder balls are provided at the terminal ends of the second conductive traces to allow external connection of the chip. The fully-exposed heat sink is mounted on the substrate. The heat sink is formed with a plurality of supportive legs arranged in such a manner as to allow a bottom surface of the heat sink to be separated from the chip and a top surface of the heat sink to be tightly attached to a cavity in a mold used to form an encapsulant for enclosing the chip. A plurality of positioning tongues are formed on the heat sink for securing the heat sink in position when performing a molding process for forming the encapsulant. With this integrated circuit package, no jig is required in the assembly of the integrated circuit package. Moreover, since there is no need to use adhesives to adhere the supportive legs onto the substrate, the integrated circuit package would not suffer from delamination as in the case of the prior art. The fully-exposed heat sink allows an increased heat-dissipating efficient as compared to the prior art.


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