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For the Inventor, By the Inventor

Beaverton, OR, United States of America

James M Powers

USPTO Granted Patents = 21 

Average Co-Inventor Count = 1.5

ph-index = 5

Forward Citations = 127(Granted Patents)


Location History:

  • Arlington, TX (US) (1996)
  • Ormond Beach, FL (US) (1999 - 2010)
  • Aloha, OR (US) (2003 - 2013)
  • Beaverton, OR (US) (2017 - 2019)

Company Filing History:

goldMedal13 out of 54,781 
 
Intel Corporation
 patents
silverMedal8 out of 832,891 
Other
 patents

Years Active: 1996-2019

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21 patents (USPTO):Explore Patents
1. 10249742 - Offstate parasitic leakage reduction for tunneling field effect transistors (2019-04-02),
2. 10096474 - Methods and structures to prevent sidewall defects during selective epitaxy (2018-10-09),
3. 9711591 - Methods of forming hetero-layers with reduced surface roughness and bulk defect density of non-native surfaces and the structures formed thereby (2017-07-18),
4. 9698013 - Methods and structures to prevent sidewall defects during selective epitaxy (2017-07-04),
5. 8513111 - Forming semiconductor structures (2013-08-20),
6. 7763395 - Radiation stability of polymer pellicles (2010-07-27),
7. 7676973 - Firearm or repeating pyrotechnic mortar that advances cartridges from a magazine into a firing chamber by a chemical detonation or steam explosion (2010-03-16),
8. 7669272 - Method of launching bridge spans in bridge construction (2010-03-02),
9. 7214452 - Using perfluoropoly-ethers to form pellicles (2007-05-08),
10. 7200887 - Bridges assembled from ocean-mobile pontoon bridge modules (2007-04-10),
11. 7126223 - Semiconductor device formed with an air gap using etch back of inter layer dielectric (ILD) (2006-10-24),
12. 7068347 - Apparatus for reducing pellicle darkening (2006-06-27),
13. 7029723 - Forming chemical vapor depositable low dielectric constant layers (2006-04-18),
14. 6920728 - Column and beam construction and method (2005-07-26),
15. 6696760 - Semiconductor structure (2004-02-24),

Title: Innovative Contributions of James M Powers in Semiconductor Technology

Introduction

James M Powers, located in Beaverton, Oregon, is a notable inventor with an impressive portfolio of 21 patents. His contributions primarily focus on advancements in semiconductor technology, particularly in improving the efficiency and reliability of transistor devices.

Latest Patents

Powers’ most recent work includes several significant patents aimed at reducing parasitic leakage in tunneling field effect transistors. These innovations encompass methods for forming a non-planar conducting channel on a substrate, utilizing blocking materials that inhibit carrier leakage. Additionally, he has developed structures that prevent sidewall defects during selective epitaxy, employing innovative trench designs to minimize crystalline defects during the growth of III-V and Germanium materials.

Career Highlights

Throughout his career, James M Powers has made impactful strides in the field of semiconductors, particularly while working at Intel Corporation. His research and developments have pushed the boundaries of what is possible in transistor technology, significantly influencing the performance of electronic devices.

Collaborations

Powers has collaborated with talented professionals, including Matthew V Metz and Benjamin Chu-Kung, further enhancing the scope of his innovations. These collaborations have played a critical role in bringing groundbreaking technologies to fruition, benefiting the semiconductor industry at large.

Conclusion

James M Powers stands out as a visionary inventor whose work has considerably advanced semiconductor technology. With his extensive list of patents and collaborative efforts, he continues to contribute to innovations that drive the electronics industry forward.

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