James H Stathis

This inventor holds 16 USPTO granted patents, primarily in Semiconductor Reliability. Top assignees: International Business Machines Corporation, Globalfoundries Inc.. Active years: 2001-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: James H Stathis. Retrieved from https://idiyas.com/inventor/james-h-stathis

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 16

% Patents Active = 31.3

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 9(Granted Patents)

Company Filing History:

14 out of 166,524

International Business Machines Corporation

Years Active: 2001-2024

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Areas of Expertise:

Semiconductor Binning

Integrated Circuits

Magnetic Tunnel Junction

Wafer Testing

Voltage Measurement

Non-Destructive Analysis

Dielectric Reliability

Performance Monitoring

Stress Evaluation

Manufacturing Variations

16 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11869783 - Optimizating semiconductor binning by feed-forward process adjustment (2024-01-09),

2. 11105856 - Detection of performance degradation in integrated circuits (2021-08-31),

3. 11049744 - Optimizing semiconductor binning by feed-forward process adjustment (2021-06-29),

4. 10830841 - Magnetic tunnel junction performance monitoring based on magnetic field coupling (2020-11-10),

5. 10796833 - Magnetic tunnel junction with low series resistance (2020-10-06),

6. 10746782 - Accelerated wafer testing using non-destructive and localized stress (2020-08-18),

7. 10739397 - Accelerated wafer testing using non-destructive and localized stress (2020-08-11),

8. 10574240 - Ring oscillator structures to determine local voltage value (2020-02-25),

9. 10552278 - Non-destructive analysis to determine use history of processor (2020-02-04),

10. 10103060 - Test structures for dielectric reliability evaluations (2018-10-16),

11. 10102090 - Non-destructive analysis to determine use history of processor (2018-10-16),

12. 9287185 - Determining appropriateness of sampling integrated circuit test data in the presence of manufacturing variations (2016-03-15),

13. 9026981 - Dielectric reliability assessment for advanced semiconductors (2015-05-05),

14. 8839180 - Dielectric reliability assessment for advanced semiconductors (2014-09-16),

15. 6602772 - Method for non-contact stress evaluation of wafer gate dielectric reliability (2003-08-05),

Title: The Inventive Journey of James H Stathis

Introduction: James H Stathis is a prolific inventor based in Poughquag, NY, known for his innovative contributions in various fields.

Latest Patents: James H Stathis holds several patents in the areas of technology, healthcare, and consumer products, showcasing his diverse range of interests and expertise.

Career Highlights: With a career spanning over two decades, James H Stathis has been at the forefront of cutting-edge inventions, consistently pushing the boundaries of what is possible.

Collaborations: Throughout his career, James H Stathis has collaborated with leading companies, research institutions, and universities to bring his inventions to life, fostering a culture of innovation and creativity.

Conclusion: James H Stathis continues to inspire the next generation of inventors with his groundbreaking work and unwavering dedication to creating a better future through innovation.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]