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For the Inventor, By the Inventor

Sacramento, CA, United States of America

Jahanshir J Javanifard

This inventor holds 48 USPTO granted patents and 1 published patent application, primarily in Memory Technology. Top assignees: Intel Corporation, Micron Technology Incorporated, Sony Semiconductor Solutions Corporation. Active years: 1993-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jahanshir J Javanifard. Retrieved from https://idiyas.com/inventor/jahanshir-j-javanifard

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 48 

% Patents Active = 93.8

Average Co-Inventor Count = 2.8

ph-index = 20

Forward Citations = 1,258(Granted Patents)


Location History:

  • Sacramento, CA (US) (1993 - 2011)
  • Carmichael, CA (US) (2002 - 2024)

Company Filing History:

goldMedal36 out of 56,394 
 
Intel Corporation
 patents
silverMedal10 out of 39,294 
 
Micron Technology Incorporated
 patents
bronzeMedal1 out of 3,320 
 
Sony Semiconductor Solutions Corporation
 patents
where one patent can have more than one assignee

Years Active: 1993-2025

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Areas of Expertise:
Data Masking
Memory Cells
Phase-Change Memory
Charge Pump
Flash Memory
Voltage Regulation
Temperature Measurement
Access Schemes
Speculative Selection
Non-Volatile Memory
Low Voltage
Programmable Amplifier
48 patents (USPTO):Explore Patents
1. 12393354 - Data masking for memory (2025-08-19),
2. 12050784 - Data masking for memory (2024-07-30),
3. 11721379 - Cell disturb on power state transition (2023-08-08),
4. 11670357 - Memory system configured to perform a reset on one or more non-volatile memory cells upon transitioning power states (2023-06-06),
5. 11562805 - Speculative section selection within a memory device (2023-01-24),
6. 10872678 - Speculative section selection within a memory device (2020-12-22),
7. 10855295 - Access schemes for section-based data protection in a memory device (2020-12-01),
8. 10665285 - Access schemes for section-based data protection in a memory device (2020-05-26),
9. 10431281 - Access schemes for section-based data protection in a memory device (2019-10-01),
10. 9496034 - Memory device with a common source line masking circuit (2016-11-15),
11. 8259488 - Phase-change memory temperature sensitive detector (2012-09-04),
12. RE42551 - Block locking apparatus for flash memory (2011-07-11),
13. 7359231 - Providing current for phase change memories (2008-04-15),
14. 7319616 - Negatively biasing deselected memory cells (2008-01-15),
15. 6734655 - Regulator design for inductive booster pump using pulse width modulation technique (2004-05-11),

Title: The Innovative Journey of Jahanshir J Javanifard

Introduction:

Jahanshir J Javanifard is a visionary inventor based in Sacramento, California. With a passion for creating groundbreaking solutions, he has made significant contributions to the field of technology through his inventive spirit and dedication.

Latest Patents:

Jahanshir J Javanifard holds several patents in various technological domains, including advancements in renewable energy systems, artificial intelligence algorithms, and sustainable transportation solutions.

Career Highlights:

Throughout his illustrious career, Jahanshir J Javanifard has been recognized for his innovative approach to problem-solving. His work has not only revolutionized industries but has also inspired the next generation of inventors to think outside the box.

Collaborations:

Jahanshir J Javanifard has collaborated with leading tech companies, research institutions, and universities to bring his ideas to life. His ability to work across disciplines and bring together diverse teams has been instrumental in the success of his projects.

Conclusion:

In conclusion, Jahanshir J Javanifard stands as a beacon of innovation in the technological landscape. His relentless pursuit of excellence and his commitment to pushing the boundaries of what is possible make him a true pioneer in the world of inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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