The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2016
Filed:
Feb. 21, 2014
Applicant:
Sony Corporation, Tokyo, JP;
Inventors:
Makoto Kitagawa, Folsom, CA (US);
Jahanshir Javanifard, Carmichael, CA (US);
Assignee:
Sony Semiconductor Solutions Corporation, Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G11C 8/12 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 13/0023 (2013.01); G11C 13/0026 (2013.01); G11C 8/12 (2013.01); G11C 13/0064 (2013.01); G11C 2213/79 (2013.01);
Abstract
A memory device comprising a plurality of memory tiles, each tile comprising a local common source line (CSL) plate, a plurality of bitlines and a plurality of wordlines, each coupled to a plurality of memory cells and a masking circuit, coupled to each of the memory tiles, for controlling whether to raise the local CSL plate and the plurality of bitlines based on the a global common source line.
Quick Actions:
Kitagawa, Makoto. (2016). Memory device with a common source line masking circuit (U.S. Patent No. 9496034). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9496034
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile