The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 15, 2008

Filed:

Nov. 13, 2003
Applicants:

Rajesh Sundaram, Folsom, CA (US);

Jahanshir Javanifard, Carmichael, CA (US);

Kerry D. Tedrow, Folsom, CA (US);

Priya Walimbe, Folsom, CA (US);

Tom H. Ly, Rancho Cordova, CA (US);

Raymond W. Zeng, Folsom, CA (US);

Inventors:

Rajesh Sundaram, Folsom, CA (US);

Jahanshir Javanifard, Carmichael, CA (US);

Kerry D. Tedrow, Folsom, CA (US);

Priya Walimbe, Folsom, CA (US);

Tom H. Ly, Rancho Cordova, CA (US);

Raymond W. Zeng, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, the present invention includes a method to supply a negative voltage to at least one deselected wordline of a memory array. Further, while the negative voltage is supplied to deselected wordlines, a positive voltage may be supplied to a selected wordline. The memory array may be a flash memory incorporating multi-level cell architecture, in one embodiment.


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