Jae Gon Lee

This inventor holds 10 USPTO granted patents and 7 published patent applications. Top assignees: Globalfoundries Inc., Globalfoundries U.S. Inc.. Active years: 2017-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae Gon Lee. Retrieved from https://idiyas.com/inventor/jae-gon-lee-gcp7j

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 10 (Patent Applications = 7)

% Patents Active = 100.0

Average Co-Inventor Count = 3.9

ph-index = 3

Forward Citations = 34(Granted Patents)

Company Filing History:

Globalfoundries U.S. Inc.

patents

Years Active: 2017-2023

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10 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11569356 - Scaled gate contact and source/drain cap (2023-01-31),

2. 10892338 - Scaled gate contact and source/drain cap (2021-01-12),

3. 10755982 - Methods of forming gate structures for transistor devices on an IC product (2020-08-25),

4. 10636894 - Fin-type transistors with spacers on the gates (2020-04-28),

5. 10593754 - SOI device structures with doped regions providing charge sinking (2020-03-17),

6. 10553707 - FinFETs having gates parallel to fins (2020-02-04),

7. 10475890 - Scaled memory structures or other logic devices with middle of the line cuts (2019-11-12),

8. 10090204 - Vertical FINFET structure and methods of forming same (2018-10-02),

9. 10068902 - Integrated circuit structure incorporating non-planar field effect transistors with different channel region heights and method (2018-09-04),

10. 9847391 - Stacked nanosheet field-effect transistor with diode isolation (2017-12-19),

Title: The Innovative Contributions of Inventor Jae Gon Lee

Introduction

Jae Gon Lee is a prolific inventor based in Waterford, NY, with an impressive portfolio of 10 patents. His work primarily focuses on semiconductor structures, where he has developed innovative solutions that enhance the functionality and efficiency of electronic devices.

Latest Patents

Among his latest patents is the "Scaled Gate Contact and Source/Drain Cap," which addresses challenges associated with semiconductor structures. This patent features a novel gate structure composed of an active region, source and drain contacts that are strategically placed adjacent to the gate structure. It includes a unique capping material over the source and drain contacts, with a gate contact formed directly above the active region and over the capping material. Notably, the invention employs a U-shaped dielectric material surrounding the gate contact, positioned above the source and drain contacts, ensuring direct electrical contact with these components.

Career Highlights

Jae Gon Lee has made significant strides in his career, most notably with GlobalFoundries Inc. and its subsidiary, GlobalFoundries U.S. Inc. His experience in these influential companies allows him to integrate his inventive ideas into practical applications, pushing the boundaries of semiconductor technology.

Collaborations

Throughout his career, Jae Gon Lee has collaborated with talented individuals, including Hui Zang and Jerome Ciavatti. These collaborations foster innovation, as they combine the strengths of various experts to drive advancements in the field of semiconductors.

Conclusion

As an inventor, Jae Gon Lee continues to shape the future of semiconductor technology. With each patent, he contributes to the evolving landscape of electronics, addressing critical challenges and paving the way for new innovations. His dedication to research and development not only reflects his expertise but also his commitment to enhancing the technological capabilities of modern society.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

7 patents pending: