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For the Inventor, By the Inventor

Meridian, ID, United States of America

Hung-Wei Liu

This inventor holds 17 USPTO granted patents and 5 published patent applications and 1 EPO patent, primarily in Vertical Transistors. Top assignee: Micron Technology Incorporated. Active years: 2019-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hung-Wei Liu. Retrieved from https://idiyas.com/inventor/hung-wei-liu-547aq0ka

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 17 

% Patents Active = 100.0

 

Average Co-Inventor Count = 4.8

ph-index = 2

Forward Citations = 9(Granted Patents)


Company Filing History:

goldMedal17 out of 39,253 
 
Micron Technology Incorporated
 patents

Years Active: 2019-2025

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Areas of Expertise:
Vertical Transistor
Integrated Circuitry
Single-Crystal Structures
NAND Memory Arrays
Semiconductor Formation
Grain Boundaries
Channel Region
Fabrication Methods
Transistor Devices
Source/Drain Regions
17 patents (USPTO):Explore Patents
1. 12432928 - Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry (2025-09-30),
2. 12256553 - On-die formation of single-crystal semiconductor structures (2025-03-18),
3. 12191354 - Vertical transistors having at least 50% grain boundaries offset between top and bottom source/drain regions and the channel region that is vertically therebetween (2025-01-07),
4. 12113130 - Transistor and methods of forming integrated circuitry (2024-10-08),
5. 12057493 - Integrated circuitry, method used in the fabrication of a vertical transistor, and method used in the fabrication of integrated circuitry (2024-08-06),
6. 11871582 - Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry (2024-01-09),
7. 11777011 - Integrated circuitry, method used in the fabrication of a vertical transistor, and method used in the fabrication of integrated circuitry (2023-10-03),
8. 11688808 - Transistor and methods of forming integrated circuitry (2023-06-27),
9. 11683937 - On-die formation of single-crystal semiconductor structures (2023-06-20),
10. 11637175 - Vertical transistors (2023-04-25),
11. 11417730 - Vertical transistors with channel region having vertically elongated crystal grains that individually are directly against both of the top and bottom source/drain regions (2022-08-16),
12. 11404571 - Methods of forming NAND memory arrays (2022-08-02),
13. 11387369 - Semiconductor structure formation (2022-07-12),
14. 11264395 - Vertical transistor, integrated circuitry, method of forming a vertical transistor, and method of forming integrated circuitry (2022-03-01),
15. 11024736 - Transistor and methods of forming integrated circuitry (2021-06-01),

Title: Inventor Hung-Wei Liu: Revolutionizing Technology in Meridian

Introduction: Hung-Wei Liu is a visionary inventor based in Meridian, ID, known for his groundbreaking contributions to the field of technology.

Latest Patents: Hung-Wei Liu holds several patents in the areas of artificial intelligence, renewable energy, and sustainable technologies, showcasing his innovative mindset and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Hung-Wei Liu has worked with top research institutions and leading tech companies to develop cutting-edge solutions that have had a significant impact on various industries.

Collaborations: Throughout his career, Hung-Wei Liu has collaborated with renowned scientists, engineers, and researchers to bring his ideas to life, fostering a culture of innovation and creativity in the tech community.

Conclusion: Hung-Wei Liu's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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