The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2022

Filed:

Dec. 20, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Shen Hu, Boise, ID (US);

Hung-Wei Liu, Meridian, ID (US);

Xiao Li, Boise, ID (US);

Zhiqiang Xie, Meridian, ID (US);

Corey Staller, Boise, ID (US);

Jeffery B. Hull, Boise, ID (US);

Anish A. Khandekar, Boise, ID (US);

Thomas A. Figura, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78642 (2013.01); H01L 21/02112 (2013.01); H01L 29/66666 (2013.01);
Abstract

An example apparatus includes forming a working surface of a substrate material. The example apparatus includes trench formed between two semiconductor structures on the working surface of the substrate material. The example apparatus further includes access lines formed on neighboring sidewalls of the semiconductor structures opposing a channel region separating a first source/drain region and a second source/drain region. The example apparatus further includes a time-control formed inhibitor material formed over a portion of the sidewalls of the semiconductor structures. The example apparatus further includes a dielectric material formed over the semiconductor structures to enclose a non-solid space between the access lines.


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