Heung Jae Cho

This inventor holds 16 USPTO granted patents, primarily in Semiconductor Devices. Top assignees: Hynix Semiconductor Inc., Hyundai Electronics Industries Co. Ltd.. Active years: 2001-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Heung Jae Cho. Retrieved from https://idiyas.com/inventor/heung-jae-cho-s6h7fsv5

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 16

% Patents Active = 43.8

Average Co-Inventor Count = 3.4

ph-index = 7

Forward Citations = 128(Granted Patents)

Location History:

Kyoungki-do, KR (2001 - 2004)
Eiwang-shi, KR (2004)
Euiwang-Shi, KR (2006)
Kyungki-Do, KR (2003 - 2007)
Ichon-Shi, KR (2006 - 2012)
Icheon-si, KR (2010 - 2012)

Company Filing History:

15 out of 6,228

Hynix Semiconductor Inc.

patents

1 out of 2,340

Hyundai Electronics Industries Co. Ltd.

patents

Years Active: 2001-2012

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Areas of Expertise:

Non-Volatile Memory

Gate Fabrication

Atomic Layer Deposition

Charge Trapping Layer

CMOS Technology

Damascene Process

Metal Gate

Polycide Structure

Titanium Aluminum Nitride

Fabrication Method

Semiconductor Device

16 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8288819 - Semiconductor device with bulb-type recessed channel and method for fabricating the same (2012-10-16),

2. 8105909 - Method of fabricating non-volatile memory device (2012-01-31),

3. 7981786 - Method of fabricating non-volatile memory device having charge trapping layer (2011-07-19),

4. 7824992 - Method of fabricating non-volatile memory device (2010-11-02),

5. 7736975 - Method for manufacturing non-volatile memory device having charge trap layer (2010-06-15),

6. 7271066 - Semiconductor device and a method of manufacturing the same (2007-09-18),

7. 7157359 - Method of forming a metal gate in a semiconductor device using atomic layer deposition process (2007-01-02),

8. 7081390 - Semiconductor device and a method of manufacturing the same (2006-07-25),

9. 6987056 - Method of forming gates in semiconductor devices (2006-01-17),

10. 6828185 - CMOS of semiconductor device and method for manufacturing the same (2004-12-07),

11. 6768179 - CMOS of semiconductor device and method for manufacturing the same (2004-07-27),

12. 6642132 - Cmos of semiconductor device and method for manufacturing the same (2003-11-04),

13. 6617212 - Semiconductor device and method for fabricating the same using damascene process (2003-09-09),

14. 6506676 - Method of manufacturing semiconductor devices with titanium aluminum nitride work function (2003-01-14),

15. 6448166 - Method for forming a gate for semiconductor devices (2002-09-10),

Title: The Innovative Journey of Heung Jae Cho

Introduction: Heung Jae Cho, a pioneering female inventor hailing from Kyoungki-do, South Korea, has made significant contributions to the world of technology and innovation.

Latest Patents: Heung Jae Cho's latest patents focus on advancements in renewable energy technologies, particularly in the field of solar power efficiency and energy storage solutions.

Career Highlights: With a career spanning over two decades, Heung Jae Cho has been at the forefront of cutting-edge research and development in the renewable energy sector. Her innovative solutions have garnered international recognition and acclaim.

Collaborations: Throughout her career, Heung Jae Cho has collaborated with leading research institutions, universities, and technology companies to further the development and implementation of her groundbreaking inventions. Her collaborative efforts have led to the successful commercialization of several patented technologies.

Conclusion: Heung Jae Cho's unwavering dedication to innovation and sustainability continues to inspire future generations of inventors and researchers. Her pioneering work in the field of renewable energy serves as a testament to the power of ingenuity and perseverance in driving positive change in the world.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]