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For the Inventor, By the Inventor

Austin, TX, United States of America

Gracieli Posser

USPTO Granted Patents = 14

Average Co-Inventor Count = 4.7

ph-index = 3

Forward Citations = 21(Granted Patents)


Company Filing History:

goldMedal14 out of 2,542 
 
Cadence Design Systems, Inc.
 patents

Years Active: 2019-2025

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14 patents (USPTO):
1. 12393760 - Wire density-aware layer assignment (2025-08-19),
2. 11734485 - Routing congestion based on fractional via cost and via density (2023-08-22),
3. 11675955 - Routing using rule-based blockage extension (2023-06-13),
4. 11461530 - Circuit design routing based on routing demand adjustment (2022-10-04),
5. 10997352 - Routing congestion based on layer-assigned net and placement blockage (2021-05-04),
6. 10963617 - Modifying route topology to fix clock tree violations (2021-03-30),
7. 10885257 - Routing congestion based on via spacing and pin density (2021-01-05),
8. 10685164 - Circuit design routing based on parallel run length rules (2020-06-16),
9. 10579767 - Systems and methods for routing a clock net with multiple layer ranges (2020-03-03),
10. 10460066 - Routing framework to resolve single-entry constraint violations for integrated circuit designs (2019-10-29),
11. 10460065 - Routing topology generation using spine-like tree structure (2019-10-29),
12. 10460064 - Partition-aware grid graph based hierarchical global routing (2019-10-29),
13. 10460063 - Integrated circuit routing based on enhanced topology (2019-10-29),
14. 10289792 - Systems and methods for clustering pins for power (2019-05-14),

Title: The Innovative Mind of Gracieli Posser: A Patent Dynamo in Austin, TX

Introduction: Gracieli Posser, a prolific inventor based in Austin, TX, has made significant contributions to the field of electronic design automation (EDA) with his groundbreaking patents and inventive solutions.

Latest Patents: Posser's latest patents showcase his expertise in routing congestion and rule-based blockage extension in circuit design. His inventions focus on optimizing routing processes by considering factors such as fractional via cost, via density, and design rules.

Career Highlights: Gracieli Posser is a key figure at Cadence Design Systems, Inc., a leading company in the EDA industry. With 13 patents to his name, Posser has demonstrated a deep understanding of circuit design and a knack for developing innovative solutions to complex problems.

Collaborations: Posser's innovative work has been supported by his talented coworkers, Mehmet Can Yildiz and Zhuo Li. Together, they form a dynamic team at Cadence Design Systems, Inc., driving advancements in EDA technology.

Conclusion: Gracieli Posser's relentless pursuit of innovation and his remarkable patent portfolio solidify his reputation as a visionary inventor in the field of electronic design automation. His contributions continue to shape the future of circuit design, making him a respected figure in the industry.

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