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Austin, TX, United States of America

Gracieli Posser

This inventor holds 18 USPTO granted patents. Top assignee: Cadence Design Systems, Inc.. Active years: 2019-2026.

USPTO Granted Patents = 18

% Patents Active = 88.9

Average Co-Inventor Count = 4.7

ph-index = 4

Forward Citations = 28(Granted Patents)

Company Filing History:

18 out of 2,617

Cadence Design Systems, Inc.

Years Active: 2019-2026

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18 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12651110 - Grid cell routing capacity adjustment for detected regions (2026-06-09),

2. 12585858 - Grid cell routing capacity adjustment based on pin density (2026-03-24),

3. 12505277 - Cell-based pin access location generation (2025-12-23),

4. 12505274 - Detecting and modeling via during global routing (2025-12-23),

5. 12393760 - Wire density-aware layer assignment (2025-08-19),

6. 11734485 - Routing congestion based on fractional via cost and via density (2023-08-22),

7. 11675955 - Routing using rule-based blockage extension (2023-06-13),

8. 11461530 - Circuit design routing based on routing demand adjustment (2022-10-04),

9. 10997352 - Routing congestion based on layer-assigned net and placement blockage (2021-05-04),

10. 10963617 - Modifying route topology to fix clock tree violations (2021-03-30),

11. 10885257 - Routing congestion based on via spacing and pin density (2021-01-05),

12. 10685164 - Circuit design routing based on parallel run length rules (2020-06-16),

13. 10579767 - Systems and methods for routing a clock net with multiple layer ranges (2020-03-03),

14. 10460066 - Routing framework to resolve single-entry constraint violations for integrated circuit designs (2019-10-29),

15. 10460065 - Routing topology generation using spine-like tree structure (2019-10-29),

Title: The Innovative Mind of Gracieli Posser: A Patent Dynamo in Austin, TX

Introduction: Gracieli Posser, a prolific inventor based in Austin, TX, has made significant contributions to the field of electronic design automation (EDA) with his groundbreaking patents and inventive solutions.

Latest Patents: Posser's latest patents showcase his expertise in routing congestion and rule-based blockage extension in circuit design. His inventions focus on optimizing routing processes by considering factors such as fractional via cost, via density, and design rules.

Career Highlights: Gracieli Posser is a key figure at Cadence Design Systems, Inc., a leading company in the EDA industry. With 13 patents to his name, Posser has demonstrated a deep understanding of circuit design and a knack for developing innovative solutions to complex problems.

Collaborations: Posser's innovative work has been supported by his talented coworkers, Mehmet Can Yildiz and Zhuo Li. Together, they form a dynamic team at Cadence Design Systems, Inc., driving advancements in EDA technology.

Conclusion: Gracieli Posser's relentless pursuit of innovation and his remarkable patent portfolio solidify his reputation as a visionary inventor in the field of electronic design automation. His contributions continue to shape the future of circuit design, making him a respected figure in the industry.

Profile summary based on public USPTO records.

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