The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2026
Filed:
Nov. 14, 2022
Cadence Design Systems, Inc., San Jose, CA (US);
Gracieli Posser, Austin, TX (US);
Wing-Kai Chow, Austin, TX (US);
Mateus Paiva Fogaça, Porto Alegre, BR;
Mehmet Can Yildiz, Austin, TX (US);
Charles Jay Alpert, Cedar Park, TX (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Various embodiments provide for adjusting routing capacity of a grid cell of one or more layers of a circuit design based on detected regions, such as notch regions (e.g., corners of macros, blockage corners) and input/output (IO) pin regions. More particularly, various embodiments detect one or more notch regions in a circuit design, detect one or more I/O pin regions in the circuit design, and adjust (e.g., reduce) routing capacity of one or more grid cells of one or more detected regions.