The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 19, 2025
Filed:
Jul. 06, 2022
Cadence Design Systems, Inc., San Jose, CA (US);
Derong Liu, Austin, TX (US);
Wing-Kai Chow, Austin, TX (US);
Gracieli Posser, Austin, TX (US);
Mehmet Can Yildiz, Austin, TX (US);
Charles Jay Alpert, Cedar Park, TX (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Aspects of the present disclosure address systems and methods for density-aware layer assignment for integrated circuit (IC) designs. Data describing an IC design is accessed. The IC design comprises a net and a set of routing layers. Single-layer routing and an initial layer assignment is performed on the set of nets. The single-layer routing and the initial layer assignment comprises generating a route for a net from the set of nets and assigning the route to one or more layers from the set of layers. A multi-layer density map is generated based on the single-layer routing and the initial layer assignment on the set of nets. Incremental layer reassignment is performed on the set of nets based on the multi-layer density map. The incremental layer assignment comprises reassigning a segment of the route from the first layer to a second layer from the set of layers based on the density value.