George Perlegos

This inventor holds 16 USPTO granted patents, primarily in Semiconductor Memory. Top assignees: Intel Corporation, Seeq Technology, Incorporated. Active years: 1976-1988.

IDiyas Innovation Intelligence. (2026). Inventor Profile: George Perlegos. Retrieved from https://idiyas.com/inventor/george-perlegos

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 16

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 13

Forward Citations = 561(Granted Patents)

Location History:

Santa Clara, CA (US) (1976 - 1978)
Cupertino, CA (US) (1980 - 1985)
Fremont, CA (US) (1983 - 1988)

Company Filing History:

Seeq Technology, Incorporated

patents

Years Active: 1976-1988

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Areas of Expertise:

Fault-Tolerant Memory

Non-Volatile Memory

EPROM Cell

Floating Gate Storage

Sensing Amplifier

MOS Memory Device

Redundant Word Lines

Electrical Partitioning

Memory Array

Read-Only Memory

Programmable Memory

Decoding Circuit

16 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 4768169 - Fault-tolerant memory array (1988-08-30),

2. 4558344 - Electrically-programmable and electrically-erasable MOS memory device (1985-12-10),

3. 4546454 - Non-volatile memory cell fuse element (1985-10-08),

4. 4538245 - Enabling circuit for redundant word lines in a semiconductor memory array (1985-08-27),

5. 4535259 - Sense amplifier for use with a semiconductor memory array (1985-08-13),

6. 4519849 - Method of making EPROM cell with reduced programming voltage (1985-05-28),

7. 4489401 - Electrical partitioning scheme for improving yields during the (1984-12-18),

8. 4412310 - EPROM Cell with reduced programming voltage and method of fabrication (1983-10-25),

9. 4266283 - Electrically alterable read-mostly memory (1981-05-05),

10. 4264828 - MOS Static decoding circuit (1981-04-28),

11. 4223394 - Sensing amplifier for floating gate memory devices (1980-09-16),

12. 4203158 - Electrically programmable and erasable MOS floating gate memory device (1980-05-13),

13. 4114255 - Floating gate storage device and method of fabrication (1978-09-19),

14. 4103189 - MOS Buffer circuit (1978-07-25),

15. 4094012 - Electrically programmable MOS read-only memory with isolated decoders (1978-06-06),

Title: The Innovative Journey of George Perlegos

Introduction: George Perlegos, a pioneering inventor based in Fremont, CA, has made significant contributions to the field of technology through his groundbreaking inventions and patents.

Latest Patents: George Perlegos holds several patents in the technology sector, with his most recent ones focusing on semiconductor devices and integrated circuits, showcasing his ongoing commitment to innovation in the industry.

Career Highlights: With a career spanning several decades, George Perlegos has held key roles in various tech companies, leading research and development teams to create cutting-edge solutions. His work has revolutionized the semiconductor industry, earning him a reputation as a visionary inventor.

Collaborations: Throughout his career, George Perlegos has collaborated with top researchers, engineers, and industry experts to bring his inventions to life. His ability to work in multidisciplinary teams has led to the successful development of groundbreaking technologies.

Conclusion: George Perlegos' relentless pursuit of innovation and his passion for pushing the boundaries of technology have solidified his position as a prominent figure in the world of inventions. His contributions continue to inspire future generations of inventors and shape the technological landscape for years to come.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]