The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 1985

Filed:

Jun. 18, 1982
Applicant:
Inventors:

George Smarandoiu, Palo Alto, CA (US);

George Perlegos, Fremont, CA (US);

Assignee:

Seeq Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ; G11C / ; G11C / ;
U.S. Cl.
CPC ...
307530 ; 307468 ; 365104 ; 365196 ;
Abstract

A sense amplifier (124) for use in determining the binary state of a selected storage device (4) in a semiconductor memory array (2) is disclosed. The sense amplifier (124) comprises a sensing section (150), a reference signal generator (148), and an inverting amplifier section (152). A relatively small current transistor (164) connected between a source of operating potential (158) and a voltage node (162) in the sensing section (150) supplies read currents to the selected storage device (4) via an enabled bit line (8) in the array (2). A second transistor (168) of relatively large size connected to the voltage node (162) in parallel with the current transistor (164) operates to rapidly raise the potential on the bit line (8) when the bit line (8) is first enabled. A third transistor (166) also of relatively large size connected between the voltage node (162) and the bit line (8) serves as a transfer gate for read currents. The reference signal generator (148) feeds a reference potential V.sub.ref to the control gates of the second and third transistors (168, 166), thereby establishing a quiescent bit line potential. The binary state of the selected storage device (4) can then be ascertained by sensing whether the voltage at the voltage node (162) drops in response to current flow through the enabled bit line (8) and selected storage device (4). Any voltage drop at the voltage node (162) which does occur is detected and amplified by the inverting amplifier section (152) of the sense amplifier.


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