For the Inventor, By the Inventor

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San Jose, CA, United States of America

Seeq Technology, Incorporated

USPTO Granted Patents = 32

Forward Citations = 968

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28 inventors (with patents filed for the assignee):

George Perlegos (6 out of 16 patents)

Gust Perlegos (5 out of 6 patents)

Stephen F Dreyer (5 out of 24 patents)

4. George Smarandoiu (4 out of 14 patents)

5. Robert X Jin (4 out of 13 patents)

6. Eric T West (3 out of 15 patents)

7. Namakkal S Sambamurthy (3 out of 8 patents)

8. John P VanGilder (3 out of 3 patents)

9. Woo-Ping Lai (3 out of 3 patents)

10. Anil Gupta (3 out of 4 patents)

11. Dumitru G Cioaca (3 out of 24 patents)

12. Tsung-Ching Wu (2 out of 13 patents)

13. Ting-Wah Wong (2 out of 34 patents)

14. Rong-Hui Hu (2 out of 4 patents)

15. Tien-Ler Lin (2 out of 2 patents)

32 patents: Sort by Forward Citations

1. 5920897 - Apparatus and method for providing multiple channel clock-data alignment (1999-07-06),

2. 5912924 - Bidirectional channels using common pins for transmit and receive paths (1999-06-15),

3. 5898678 - Method and apparatus for using synthetic preamable signals to awaken (1999-04-27),

4. 5790888 - State machine for selectively performing an operation on a single or a (1998-08-04),

5. 5777488 - Integrated circuit I/O node useable for configuration input at reset and (1998-07-07),

6. 5768301 - Apparatus and method for detecting and correcting pair swap, and (1998-06-16),

7. 5648956 - Apparatus and method for full-duplex ethernet communications (1997-07-15),

8. 5606295 - Crystal oscillator circuits (1997-02-25),

9. 5504738 - Apparatus and method for full-duplex ethernet communications (1996-04-02),

10. 5311114 - Apparatus and method for full-duplex ethernet communications (1994-05-10),

11. 5101379 - Apparatus for page mode programming of an EEPROM cell array with false (1992-03-31),

12. 5029131 - Fault tolerant differential memory cell and sensing (1991-07-02),

13. 4888738 - Current-regulated, voltage-regulated erase circuit for EEPROM memory (1989-12-19),

14. 4855955 - Three transistor high endurance EEPROM cell (1989-08-08),

15. 4822750 - MOS floating gate memory cell containing tunneling diffusion region in (1989-04-18),

Seeq Technology, Incorporated is a leading provider of advanced analytics solutions for process manufacturing companies. Our software platform enables businesses to unlock the hidden value within their industrial process data, empowering them to improve operational efficiency, optimize production, and make data-driven decisions. With Seeq, organizations can easily connect to various data sources, analyze real-time and historical data, visualize insights through interactive dashboards, and collaborate with teams for enhanced problem-solving and continuous improvement. Visit our website to learn more about how Seeq is driving digital transformation in the process manufacturing industry.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Dec 23 2025

32 Patents

#237 in San Jose, CA

#2,456 in California

#10,234 in US

#20,074 in the World

San Jose, CA, United States of America

Seeq Technology, Incorporated

Forward Citations = 968

28 inventors:

George Perlegos (6 out of 16 patents)

Gust Perlegos (5 out of 6 patents)

Stephen F Dreyer (5 out of 24 patents)

4. George Smarandoiu (4 out of 14 patents)

5. Robert X Jin (4 out of 13 patents)

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