The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 1989

Filed:

Jul. 16, 1987
Applicant:
Inventors:

Gust Perlegos, Freemont, CA (US);

Tsung-Ching Wu, San Jose, CA (US);

Assignee:

Seeq Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437052 ; 437043 ;
Abstract

A two device floating gate MOS nonvolatile memory cell is disclosed including a floating gate memory device coupled to a select device wherein a thin tunnel dielectric region of insulation material between the substrate and floating gate of the memory device is located in an area above the channel of the memory device in the substrate and wherein an implanted region in the substrate to facilitate the tunneling of carriers in and out of the floating gate extends appreciably underneath the edges of the field oxide regions forming the periphery of the sides of the channel of the memory device. A select device is located in series with the memory device. A process for fabricating this memory cell is also disclosed wherein the doped tunnelling region in the substrate is defined and implanted prior to definition of the field regions.


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