The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 1983
Filed:
Oct. 14, 1980
Applicant:
Inventors:
George J Korsh, Redwood City, CA (US);
Mark A Holler, Milpitas, CA (US);
George Perlegos, Fremont, CA (US);
Paolo Gargini, Palo Alto, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365185 ; 365218 ; 365104 ;
Abstract
An improved floating gate MOS EPROM cell which is programmable at a lower potential (12 volts) than prior art devices which often require 25 volts. The oxide thickness between the floating gate and overlying control gate is thicker at the edges of the floating gate than in the central portion. The thicker oxide at the edges prevents uncontrolled DC erasing. This allows a thinner oxide to be used in the central portion and provides the increased capacitance coupling needed for programming at a lower potential.