Milan, Italy

Enrico Varesi

This inventor holds 40 USPTO granted patents and 22 published patent applications, primarily in 3D Memory Architecture. Top assignees: Micron Technology Incorporated, Intel Corporation, Stmicroelectronics S.r.l.. Active years: 2008-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Enrico Varesi. Retrieved from https://idiyas.com/inventor/enrico-varesi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 40 

% Patents Active = 97.5

Average Co-Inventor Count = 3.7

ph-index = 4

Forward Citations = 123(Granted Patents)


Location History:

  • Santa Clara, CA (US) (2019 - 2021)
  • Milan, IT (2008 - 2024)

Company Filing History:


Years Active: 2008-2026

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Areas of Expertise:
Memory Devices
3D Memory Arrays
Phase Change Memory
Chalcogenide Devices
Atomic Layer Deposition
Word Line Structures
Memory Cell Formation
Textured Memory Cells
Decoding Architecture
Composite Electrode Materials
Vertical Structures
Heating Phase Change Material
40 patents (USPTO):Explore Patents

Title: Enrico Varesi: A Pioneer in Memory Cell Technology

Introduction

Enrico Varesi, based in Milan, Italy, is a distinguished inventor known for his significant contributions to memory cell technology. With an impressive portfolio of 33 patents, Varesi has established himself as a key figure in the field of electronics and memory storage.

Latest Patents

Among his latest innovations are two noteworthy patents that explore advanced techniques for memory cells. The first patent introduces memory cells with sidewall and bulk regions in vertical structures. This invention details a memory cell that comprises a first electrode, a second electrode, and a self-selecting storage element positioned between them. The structure features a bulk region extending between the electrodes, with distinct compositions of chalcogenide material in the bulk and sidewall regions, enhancing the memory cell's performance.

The second patent focuses on a memory array having air gaps, describing methods for forming a memory array that includes memory cells and a dielectric material separating word lines. This innovative approach includes the creation of voids in the dielectric material, which serve to separate word lines and form air gaps, potentially improving the efficiency of memory arrays.

Career Highlights

Enrico Varesi has a remarkable career, having worked with renowned companies such as Micron Technology Incorporated and Intel Corporation. His experience at these leading technology firms has undoubtedly enriched his expertise in memory cell design and innovation.

Collaborations

Throughout his career, Varesi has collaborated with talented colleagues, including Lorenzo Fratin and Paolo Fantini. These partnerships have likely fostered a creative environment that has led to groundbreaking advancements in memory technology.

Conclusion

With his extensive patent portfolio and collaborative efforts, Enrico Varesi continues to be a driving force in the development of advanced memory cell technology. His innovative work not only highlights his individual contributions but also emphasizes the importance of collaboration in achieving technological breakthroughs.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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