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For the Inventor, By the Inventor

Camas, WA, United States of America

Derryl D J Allman

This inventor holds 48 USPTO granted patents, primarily in Integrated Circuit Fabrication. Top assignees: Lsi Logic Corporation, Hyundai Electronics America, Inc., Lsi Corporation. Active years: 2001-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Derryl D J Allman. Retrieved from https://idiyas.com/inventor/derryl-d-j-allman

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 48

% Patents Active = 83.3

Average Co-Inventor Count = 2.5

ph-index = 15

Forward Citations = 615(Granted Patents)


Location History:

  • Colorado Springs, CO (US) (2001 - 2004)
  • Camas, WA (US) (2002 - 2009)

Company Filing History:

goldMedal36 out of 3,715 
 
Lsi Logic Corporation
 patents
silverMedal7 out of 195 
 
Hyundai Electronics America, Inc.
 patents
bronzeMedal3 out of 2,353 
 
Lsi Corporation
 patents
4. 1 out of 258 
 
Nantero, Inc.
 patents
5. 1 out of 834,601 
Other
 patents

Years Active: 2001-2009

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Areas of Expertise:
Nanotube Fuse Structure
Integrated Circuit
Low Dielectric Constant
Bond Pad Design
Optical Waveguide
Capacitor Fabrication
Chemical Mechanical Polishing
Void Diffusion Control
Plasma Treatment
Thermal Low K Dielectrics
Wafer Planarization
Silicon Wafers
48 patents (USPTO):Explore Patents
1. 7598127 - Nanotube fuse structure (2009-10-06),
2. 7582566 - Method for redirecting void diffusion away from vias in an integrated circuit design (2009-09-01),
3. 7436040 - Method and apparatus for diverting void diffusion in integrated circuit conductors (2008-10-14),
4. 7384801 - Integrated circuit with inductor having horizontal magnetic flux lines (2008-06-10),
5. 7361965 - Method and apparatus for redirecting void diffusion away from vias in an integrated circuit design (2008-04-22),
6. 7253497 - Integrated circuit with inductor having horizontal magnetic flux lines (2007-08-07),
7. 7118985 - Method of forming a metal-insulator-metal capacitor in an interconnect cavity (2006-10-10),
8. 7081379 - Local interconnect for integrated circuit (2006-07-25),
9. 7023067 - Bond pad design (2006-04-04),
10. 6951787 - Capacitor with stoichiometrically adjusted dielectric and method of fabricating same (2005-10-04),
11. 6927494 - Local interconnect (2005-08-09),
12. 6875702 - Plasma treatment system (2005-04-05),
13. 6872612 - Local interconnect for integrated circuit (2005-03-29),
14. 6775453 - On-chip graded index of refraction optical waveguide and damascene method of fabricating the same (2004-08-10),
15. 6678950 - Method for forming a bonding pad on a substrate (2004-01-20),

Title: The Innovative Journey of Derryl D J Allman

Introduction:

Derryl D J Allman, a talented inventor hailing from Camas, WA (US), has made significant contributions to the world of technology through his groundbreaking innovations.

Latest Patents:

Derryl D J Allman holds several patents in the field of renewable energy technologies, including a solar panel design that increases energy efficiency by 30%.

Career Highlights:

With over two decades of experience in the renewable energy sector, Derryl D J Allman has led research teams in developing cutting-edge solutions for sustainable energy production. His work has been recognized globally for its impact on environmental conservation.

Collaborations:

Throughout his career, Derryl D J Allman has collaborated with leading research institutions and universities to further advance renewable energy technologies. His partnerships have resulted in the successful implementation of innovative solutions in the industry.

Conclusion:

In conclusion, Derryl D J Allman's passion for innovation and commitment to sustainability have positioned him as a key figure in the field of renewable energy. His contributions continue to inspire future generations of inventors to create a more sustainable world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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