The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2004
Filed:
Nov. 01, 2001
Applicant:
Inventors:
Derryl D. J. Allman, Camas, WA (US);
David T. Price, Gresham, OR (US);
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/10 ;
U.S. Cl.
CPC ...
H05K 3/10 ;
Abstract
A bonding pad for an integrated circuit, having a conductive base layer. The conductive base layer has slots formed in it, where the slots extend completely through the conductive base layer. An insulating layer is disposed on top of the conductive base layer. The insulating layer protrudes into the slots of the conductive base layer. The insulating layer also includes a low k material. A conductive top layer is disposed on top of the insulating layer.
Quick Actions:
Allman, Derryl D. J.. (2004). Method for forming a bonding pad on a substrate (U.S. Patent No. 6678950). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6678950
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile