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For the Inventor, By the Inventor

Campbell, CA, United States of America

Darin A Chan

This inventor holds 41 USPTO granted patents and 1 EPO patent, primarily in Semiconductor Technology. Top assignees: Advanced Micro Devices Corporation, Globalfoundries Singapore Pte. Ltd., Globalfoundries Inc.. Active years: 1995-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Darin A Chan. Retrieved from https://idiyas.com/inventor/darin-a-chan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 41

% Patents Active = 75.6


Average Co-Inventor Count = 3.1

ph-index = 10

Forward Citations = 407(Granted Patents)


Location History:

  • San Francisco, CA (US) (2006 - 2009)
  • Campbell, CA (US) (1995 - 2012)
  • Singapore, SG (2017 - 2021)
  • Santa Clara, CA (US) (2010 - 2023)

Company Filing History:

goldMedal33 out of 13,185 
 
Advanced Micro Devices Corporation
 patents
silverMedal6 out of 1,064 
 
Globalfoundries Singapore Pte. Ltd.
 patents
bronzeMedal2 out of 5,671 
 
Globalfoundries Inc.
 patents

Years Active: 1995-2023

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Areas of Expertise:
Semiconductor
Integrated Circuits
MRAM
Flash Memory
Memory Device
Silicon Technology
Fabrication Methods
Non-Volatile Memory
Trench Isolation
Dummy Fill Strategy
Body Effect Measurement
Dielectric Layer
41 patents (USPTO):Explore Patents
1. 11545570 - High-voltage devices integrated on semiconductor-on-insulator substrate (2023-01-03),
2. 10978510 - Memory device with density-controllable dummy fill strategy for near-MRAM periphery and far-outside-MRAM logic regions for embedded MRAM technology (2021-04-13),
3. 10374005 - Density-controllable dummy fill strategy for near-MRAM periphery and far-outside-MRAM logic regions for embedded MRAM technology and method for producing the same (2019-08-06),
4. 9825185 - Integrated circuits and methods for fabricating integrated circuits with non-volatile memory structures (2017-11-21),
5. 9780231 - Integrated circuits with flash memory and methods for producing the same (2017-10-03),
6. 9698200 - Magnetism-controllable dummy structures in memory device (2017-07-04),
7. 8293606 - Body tie test structure for accurate body effect measurement (2012-10-23),
8. 7880229 - Body tie test structure for accurate body effect measurement (2011-02-01),
9. 7861195 - Process for design of semiconductor circuits (2010-12-28),
10. 7494885 - Disposable spacer process for field effect transistor fabrication (2009-02-24),
11. 7465623 - Methods for fabricating a semiconductor device on an SOI substrate (2008-12-16),
12. 7276755 - Integrated circuit and method of manufacture (2007-10-02),
13. 7250667 - Selectable open circuit and anti-fuse element (2007-07-31),
14. 7223640 - Semiconductor component and method of manufacture (2007-05-29),
15. 7151020 - Conversion of transition metal to silicide through back end processing in integrated circuit technology (2006-12-19),

Title: The Inventor Darin A Chan: Pioneering Innovations in Campbell, CA

Introduction: Darin A Chan is a visionary inventor based in Campbell, CA, known for his groundbreaking contributions to the field of technology and beyond.

Latest Patents: Darin A Chan holds several patents in various technological domains, showcasing his versatility and ingenuity in creating novel solutions for complex problems.

Career Highlights: With a career spanning over two decades, Darin A Chan has worked with leading tech companies, research institutions, and universities, shaping the landscape of innovation through his cutting-edge inventions.

Collaborations: Throughout his career, Darin A Chan has collaborated with top-tier engineers, scientists, and researchers, fostering a culture of innovation and excellence in every project he undertakes.

Conclusion: Darin A Chan's relentless pursuit of innovation and his passion for pushing the boundaries of what is possible make him a true pioneer in the world of inventions, inspiring the next generation of inventors to dream big and create even bigger.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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