The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Oct. 18, 2007
Applicants:

Sriram Madhavan, Santa Clara, CA (US);

Qiang Chen, Cupertino, CA (US);

Darin A. Chan, Campbell, CA (US);

Jung-suk Goo, Los Altos, CA (US);

Inventors:

Sriram Madhavan, Santa Clara, CA (US);

Qiang Chen, Cupertino, CA (US);

Darin A. Chan, Campbell, CA (US);

Jung-Suk Goo, Los Altos, CA (US);

Assignee:

GlobalFoundries Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A body tie test structure and methods for its manufacture are provided. The transistor comprises a body-tied semiconductor on insulator (SOI) transistor formed in a layer of semiconductor material, the transistor comprising a cross-shaped gate structure with a substantially constant gate length L. An insulating blocking layer enables formation of a spacer region in the layer of semiconductor material separating the source and drain regions from the body tie region. A conductive channel with substantially the same inversion characteristics as the intrinsic transistor body connects the body tie to the intrinsic transistor body through the spacer region.


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