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For the Inventor, By the Inventor

Hsinchu, Taiwan

Da-Yuan Shih

This inventor holds 16 USPTO granted patents and 1 published patent application, primarily in Wafer Level Packaging. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2013-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Da-Yuan Shih. Retrieved from https://idiyas.com/inventor/da-yuan-shih-h3oj2v3w

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 16 

% Patents Active = 50.0

Average Co-Inventor Count = 3.7

ph-index = 5

Forward Citations = 213(Granted Patents)


Company Filing History:

goldMedal16 out of 42,965 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2013-2022

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Areas of Expertise:
Interconnect Crack Arrestor
Metal Post Bonding
Solder Bump Stretching
Wafer Level Packaging
Direct Bonding Processes
Lamellar Structures
Solder Ball Deposition
Joint Structure
Three-Dimensional Chip Stack
Through Vias
Multi-Chip Packaging
Bumping Method
16 patents (USPTO):Explore Patents
1. 11257767 - Interconnect crack arrestor structure and methods (2022-02-22),
2. 10340226 - Interconnect crack arrestor structure and methods (2019-07-02),
3. 10034390 - Metal post bonding using pre-fabricated metal posts (2018-07-24),
4. 9978709 - Solder bump stretching method for forming a solder bump joint in a device (2018-05-22),
5. 9679882 - Method of multi-chip wafer level packaging (2017-06-13),
6. 9521795 - Two-step direct bonding processes and tools for performing the same (2016-12-13),
7. 9475145 - Solder bump joint in a device including lamellar structures (2016-10-25),
8. 9263407 - Method for manufacturing a plurality of metal posts (2016-02-16),
9. 9230932 - Interconnect crack arrestor structure and methods (2016-01-05),
10. 9216469 - Indirect printing bumping method for solder ball deposition (2015-12-22),
11. 9082763 - Joint structure for substrates and methods of forming (2015-07-14),
12. 8927877 - Looped interconnect structure (2015-01-06),
13. 8803333 - Three-dimensional chip stack and method of forming the same (2014-08-12),
14. 8754514 - Multi-chip wafer level package (2014-06-17),
15. 8685798 - Methods for forming through vias (2014-04-01),

Title: Da-Yuan Shih: Innovator in Semiconductor Technology

Introduction

Da-Yuan Shih is a prominent inventor based in Hsin-Chu, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 16 patents. His innovative work focuses on enhancing the reliability and performance of semiconductor devices.

Latest Patents

One of Da-Yuan Shih's latest patents is the "Interconnect crack arrestor structure and methods." This invention provides a system and method for preventing cracks in semiconductor connections. An embodiment of this patent involves placing crack stoppers into the connection between a semiconductor die and a substrate. The crack stoppers can be designed as hollow or solid cylinders, strategically positioned to prevent cracks from propagating through them.

Career Highlights

Da-Yuan Shih is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work at this company has allowed him to develop and refine his innovative ideas, contributing to advancements in semiconductor technology.

Collaborations

Throughout his career, Da-Yuan Shih has collaborated with notable colleagues, including Chen-Hua Douglas Yu and Chih-Hang Tung. These collaborations have fostered a creative environment that encourages the development of groundbreaking technologies.

Conclusion

Da-Yuan Shih's contributions to semiconductor technology through his patents and collaborations highlight his role as an influential inventor in the industry. His innovative solutions continue to shape the future of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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