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For the Inventor, By the Inventor

Hsinchu, Taiwan

Chia-Kuei Hsu

This inventor holds 64 USPTO granted patents and 51 published patent applications, primarily in Semiconductor Packaging. Top assignees: Taiwan Semiconductor Manufacturing Comp. Ltd., Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2020-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chia-Kuei Hsu. Retrieved from https://idiyas.com/inventor/chia-kuei-hsu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 64 

% Patents Active = 100.0

Average Co-Inventor Count = 5.5

ph-index = 3

Forward Citations = 38(Granted Patents)

Forward Citations (Not Self Cited) = 7(Dec 10, 2025)


Company Filing History:

goldMedal63 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal1 out of 481 
 
Taiwan Semiconductor Manufacturing Co., Ltd.
 patents

Years Active: 2020-2026

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Areas of Expertise:
Semiconductor Package
Thermal Management
Warpage Control
C4 Bonding
Underfill Materials
3D Integrated Circuits
Conductive Patterns
Eccentric Via Structures
Reinforcement Structures
Delamination Reduction
Heat Dissipation
Chip Package Structure
64 patents (USPTO):Explore Patents
1. 12757759 - Method of manufacturing semiconductor packages (2026-10-06),
2. 12751307 - Semiconductor package (2026-09-29),
3. 12660721 - Reinforced substrates to mitigate underflow stress and package warp and methods of making the same (2026-06-16),
4. 12642144 - Multi-bump connection to interconnect structure and manufacturing method thereof (2026-05-26),
5. 12550792 - Semiconductor package and method of manufacturing the same (2026-02-10),
6. 12519067 - Two-piece type stiffener structure with beveled surface for delamination reduction and methods for forming the same (2026-01-06),
7. 12512399 - Semiconductor package and method of manufacture (2025-12-30),
8. 12489027 - Semiconductor device and method of manufacture (2025-12-02),
9. 12482780 - Chip package structure including an underfill material portion comprising a cut region (2025-11-25),
10. 12476223 - Semiconductor package and method of manufacturing the same (2025-11-18),
11. 12476203 - Stiffener structure with beveled sidewall for footprint reduction and methods for forming the same (2025-11-18),
12. 12444696 - Package structure (2025-10-14),
13. 12431415 - Buffer block structures for C4 bonding and methods of using the same (2025-09-30),
14. 12424511 - High efficiency heat dissipation using discrete thermal interface material films (2025-09-23),
15. 12394698 - Underfill cushion films for packaging substrates and methods of forming the same (2025-08-19),

Title: Chia-Kuei Hsu - Innovator from Hsinchu, TW

Introduction: Chia-Kuei Hsu is a pioneering inventor hailing from Hsinchu, Taiwan, known for her groundbreaking contributions to the field of technology and innovation.

Latest Patents: Chia-Kuei Hsu's most recent patents focus on advancements in renewable energy technologies, particularly in the development of solar power systems that are more efficient and cost-effective.

Career Highlights: With a career spanning over two decades, Chia-Kuei Hsu has worked with leading research institutions and universities to push the boundaries of technological innovation. Her work has been instrumental in shaping the future of sustainable energy solutions.

Collaborations: Throughout her career, Chia-Kuei Hsu has collaborated with top companies in the renewable energy sector, as well as with fellow inventors and researchers, to bring cutting-edge technologies to the market.

Conclusion: Chia-Kuei Hsu's dedication to innovation and her passion for creating a more sustainable future have solidified her reputation as a trailblazer in the field of technology. Her work continues to inspire the next generation of inventors and innovators worldwide.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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