Hsinchu, Taiwan

Chia-Chi Tsai

This inventor holds 20 USPTO granted patents and 7 published patent applications, primarily in Audio Technology. Top assignees: Au Optronics Corporation, Globalwafers Co., Ltd., Realtek Semiconductor Inc.. Active years: 2009-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chia-Chi Tsai. Retrieved from https://idiyas.com/inventor/chia-chi-tsai

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 20 

% Patents Active = 95.0

Average Co-Inventor Count = 4.2

ph-index = 4

Forward Citations = 28(Granted Patents)


Location History:

  • Taipei, TW (2009 - 2010)
  • Kaohsiung, TW (2010)
  • Hsinchu County, TW (2019)
  • Zhubei, TW (2022)
  • Hsinchu, TW (2010 - 2024)

Company Filing History:


Years Active: 2009-2026

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Areas of Expertise:
Audio Signal Amplification
Wafer Processing
Material Analysis
Defect Inspection
Playback Circuit
Flat Display Control
Pixel Structure Fabrication
Combo-Plug Detection
Single Crystal Material
Wafer Inspection Method
20 patents (USPTO):Explore Patents

Title: Innovations by Chia-Chi Tsai: Advancements in Wafer Inspection Technology

Introduction: Chia-Chi Tsai is an accomplished inventor from Hsinchu, Taiwan, credited with 16 patents in the field of wafer inspection technology. His work significantly enhances the efficiency and accuracy of detecting defects in semiconductor wafers, contributing to advancements in the electronics industry.

Latest Patents: Among his notable contributions, Chia-Chi Tsai has developed two key patents:

1. **Method for Identifying Wafer** - This innovative method includes steps to obtain a marked frame from a wafer inspection picture. It calculates a gray scale index from multiple pixels within the marked frame, indicating the proportion of pixels whose gray scale values exceed a specified threshold. This enables the determination of whether a trace pattern in the marked frame represents a scratch or a grain boundary.

2. **Wafer Surface Defect Inspection Method and Apparatus Thereof** - This patent provides a comprehensive method and apparatus for inspecting wafer surface defects. The method involves receiving scanning information, determining reference points, and generating path information to create a curve chart. This chart is then used to identify defects and classify their types effectively.

Career Highlights: Throughout his career, Chia-Chi Tsai has made significant contributions to the field while working at prestigious companies such as AU Optronics Corporation and GlobalWafers Co., Ltd. His expertise has propelled advancements in the technology used for semiconductor manufacturing, particularly in defect detection and wafer quality assessment.

Collaborations: Chia-Chi Tsai has collaborated with renowned colleagues, including Ta-Wen Liao and Chih-Chun Yang. These collaborations have fostered innovative solutions and propelled research that addresses complex challenges in wafer inspection technologies.

Conclusion: Chia-Chi Tsai's contributions to the field of wafer inspection technology are invaluable. His 16 patents demonstrate his commitment to innovation and improving manufacturing processes in the semiconductor industry. As technology continues to evolve, his work will undoubtedly pave the way for further advancements in defect detection and quality assurance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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