The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 2010
Filed:
Sep. 19, 2008
Chih-chun Yang, Hsinchu County, TW;
Ming-yuan Huang, Taipei County, TW;
Han-tu Lin, Taichung County, TW;
Chih-hung Shih, Yilan County, TW;
Ta-wen Liao, Miaoli County, TW;
Kuo-lung Fang, Hsinchu, TW;
Chia-chi Tsai, Kaohsiung, TW;
Chih-Chun Yang, Hsinchu County, TW;
Ming-Yuan Huang, Taipei County, TW;
Han-Tu Lin, Taichung County, TW;
Chih-Hung Shih, Yilan County, TW;
Ta-Wen Liao, Miaoli County, TW;
Kuo-Lung Fang, Hsinchu, TW;
Chia-Chi Tsai, Kaohsiung, TW;
Au Optronics Corporation, Hsinchu, TW;
Abstract
A method for manufacturing a pixel structure is provided. First, a gate and a gate insulating layer are sequentially formed on the substrate. A channel layer and a second metal layer are sequentially formed on the gate insulating layer. The second metal layer is patterned to form a source and a drain by using a patterned photoresist layer formed thereon, wherein the source and the drain are disposed on a portion of the channel layer. The gate, the channel, the source and the drain form a thin film transistor. A passivation layer is formed on the patterned photoresist layer, the gate insulating layer and the thin film transistor. Then, the patterned photoresist layer is removed, such that the passivation layer thereon is removed simultaneously to form a patterned passivation layer and the drain is exposed. A pixel electrode is formed on the patterned passivation layer and the drain.