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For the Inventor, By the Inventor

Mechanicville, NY, United States of America

Biswanath Senapati

This inventor holds 13 USPTO granted patents and 13 published patent applications, primarily in Nanosheet Transistors. Top assignees: International Business Machines Corporation, Globalfoundries Inc.. Active years: 2016-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Biswanath Senapati. Retrieved from https://idiyas.com/inventor/biswanath-senapati

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 13 

% Patents Active = 84.6

Average Co-Inventor Count = 4.1

ph-index = 3

Forward Citations = 12(Granted Patents)


Company Filing History:

goldMedal10 out of 166,524 
 
International Business Machines Corporation
 patents
silverMedal3 out of 5,671 
 
Globalfoundries Inc.
 patents

Years Active: 2016-2026

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Areas of Expertise:
Nanosheet Technology
Stacked FET
Transistors
Memory Cell
Resistive Random Access Memory
Bipolar Junction Transistor
Parasitic Capacitance
Wafer Connectivity
Dielectric Fill
Signal Rail
Metal Vias
Contact Configuration
13 patents (USPTO):Explore Patents
1. 12787429 - Lateral passive diodes co-integrated with nanosheet technology (2026-11-03),
2. 12733261 - Stacked FET with local contact (2026-09-08),
3. 12696533 - Split gate contacts for vertically stacked transistors (2026-07-28),
4. 12641876 - Stacked nanosheet FETs with gate dielectric fill (2026-05-26),
5. 12626045 - Cell-based signal connectivity between wafer frontside and backside (2026-05-12),
6. 12557637 - Stacked transistors with metal vias (2026-02-17),
7. 12557298 - Resistive random access memory on a buried bitline (2026-02-17),
8. 12500144 - Backside self aligned skip via (2025-12-16),
9. 12424550 - Buried metal signal rail for memory arrays (2025-09-23),
10. 12148682 - Memory cell in wafer backside (2024-11-19),
11. 10276700 - Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors (2019-04-30),
12. 9966459 - Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistors (2018-05-08),
13. 9230913 - Metallization layers configured for reduced parasitic capacitance (2016-01-05),

Title: Inventor Biswanath Senapati - Revolutionizing Technology in Mechanicville

Introduction: Biswanath Senapati, a visionary inventor based in Mechanicville, NY, is renowned for his groundbreaking contributions to the field of technology. With a passion for innovation and a keen eye for detail, Senapati has made significant strides in various technological advancements.

Latest Patents: Senapati holds several patents in cutting-edge technologies related to artificial intelligence, renewable energy, and biotechnology. His most recent patents focus on sustainable solutions for environmental challenges and enhancing the efficiency of everyday devices.

Career Highlights: Throughout his illustrious career, Senapati has worked with leading tech companies and research institutions to bring his innovative ideas to life. His ability to think outside the box and his dedication to pushing the boundaries of technology have earned him recognition as a trailblazer in the industry.

Collaborations: Senapati has collaborated with top engineers, scientists, and designers from around the world to develop groundbreaking technologies that have the potential to shape the future. His collaborative spirit and interdisciplinary approach have led to the creation of innovative solutions that have a lasting impact.

Conclusion: In conclusion, Biswanath Senapati's relentless pursuit of innovation and his commitment to excellence have solidified his position as a pioneering inventor in Mechanicville and beyond. His work continues to inspire the next generation of inventors and serves as a testament to the power of creativity and perseverance in driving technological progress.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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