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For the Inventor, By the Inventor

Saratoga, CA, United States of America

Been-Jon K Woo

USPTO Granted Patents = 16

Average Co-Inventor Count = 1.7

ph-index = 12

Forward Citations = 385(Granted Patents)


Company Filing History:

goldMedal14 out of 54,750 
 
Intel Corporation
 patents
silverMedal2 out of 832,843 
Other
 patents

Years Active: 1988-2009

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16 patents (USPTO):Explore Patents
1. 7632736 - Self-aligned contact formation utilizing sacrificial polysilicon (2009-12-15),
2. 7465625 - Flash memory cell having reduced floating gate to floating gate coupling (2008-12-16),
3. 7348618 - Flash memory cell having reduced floating gate to floating gate coupling (2008-03-25),
4. 5470772 - Silicidation method for contactless EPROM related devices (1995-11-28),
5. 5229631 - Erase performance improvement via dual floating gate processing (1993-07-20),
6. 5210047 - Process for fabricating a flash EPROM having reduced cell size (1993-05-11),
7. 5196361 - Method of making source junction breakdown for devices with source-side (1993-03-23),
8. 5147813 - Erase performance improvement via dual floating gate processing (1992-09-15),
9. 5102814 - Method for improving device scalability of buried bit line flash EPROM (1992-04-07),
10. 5077230 - Method for improving erase characteristics of buried bit line flash (1991-12-31),
11. 5075245 - Method for improving erase characteristics of buried bit line flash (1991-12-24),
12. 4833099 - Tungsten-silicide reoxidation process including annealing in pure (1989-05-23),
13. 4784965 - Source drain doping technique (1988-11-15),
14. 4774201 - Tungsten-silicide reoxidation technique using a CVD oxide cap (1988-09-27),
15. 4757026 - Source drain doping technique (1988-07-12),

Title: The Innovative Mind of Been-Jon K Woo

Introduction

Been-Jon K Woo, an accomplished inventor based in Saratoga, CA, has significantly contributed to the technological landscape with a remarkable portfolio of 16 patents. His inventions primarily focus on advancements in semiconductor technology, particularly in the areas of contact formation and flash memory cells.

Latest Patents

Among his latest patents, Woo has developed groundbreaking technologies, such as the method for self-aligned contact formation utilizing sacrificial polysilicon. This method involves creating a spacer layer over a substrate with patterned stacks and trenches. The innovative approach includes depositing a sacrificial polysilicon layer that fills the trenches and then utilizing a patterned layer to define contact regions, ultimately leading to effective etching and open regions.

Another notable invention is his design for a flash memory cell that features reduced coupling between floating gates. This patent describes a structure where a film is deposited across the gap between two gate stacks, creating a void filled with a low-dielectric constant material, such as air. This design minimizes parasitic coupling risks and enhances the performance of flash memory cells.

Career Highlights

Throughout his career, Been-Jon K Woo has made significant strides while working at major technology firms, most notably at Intel Corporation. His work has not only advanced his career but also pushed the boundaries of what is possible within semiconductor technology.

Collaborations

In addition to his achievements, Woo has collaborated with talented professionals such as Mark A Holler and Sandra S Lee. These partnerships have fostered an environment of innovation, contributing to the successful development of his patents and further enhancing the impact of his work.

Conclusion

Been-Jon K Woo continues to be a driving force in the field of semiconductor technology through his innovative spirit and extensive patent portfolio. His contributions demonstrate a commitment to advancing technology and shaping the future of electronic devices.

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