For the Inventor, By the Inventor

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Portland, OR, United States of America

Teseda Corporation

USPTO Granted Patents = 15

% Expired Patents = 53.3

Forward Citations = 63

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15 inventors (with patents filed for the assignee):

Ralph Sanchez (6 out of 6 patents)

Armagan Akar (5 out of 5 patents)

John Raykowski (4 out of 4 patents)

4. Rich Ackerman (4 out of 4 patents)

5. Theodore Clifton Bernard (2 out of 2 patents)

6. Joseph M Salazar (2 out of 2 patents)

7. Steven R Morris (2 out of 2 patents)

8. Ajit M Limaye (2 out of 7 patents)

9. Andrew H Levy (2 out of 2 patents)

10. David S Kellerman (2 out of 2 patents)

11. Jack Frost (1 out of 1 patent)

12. Bruce Kaufman (1 out of 1 patent)

13. Brian Mason (1 out of 1 patent)

14. Peter H Decher (1 out of 2 patents)

15. Horst R Niehaus (1 out of 1 patent)

15 patents: Sort by Forward Citations

1. 10768231 - Diagnosing failing scan chains in a semiconductor integrated circuit (2020-09-08),

2. 10247777 - Detecting and locating shoot-through timing failures in a semiconductor integrated circuit (2019-04-02),

3. 9939488 - Field triage of EOS failures in semiconductor devices (2018-04-10),

4. 9659136 - Suspect logical region synthesis from device design and test information (2017-05-23),

5. 8918753 - Correlation of device manufacturing defect data with device electrical test data (2014-12-23),

6. 8907697 - Electrical characterization for a semiconductor device pin (2014-12-09),

7. 8892972 - Scan chain fault diagnosis (2014-11-18),

8. 8626460 - Secure test-for-yield chip diagnostics management system and method (2014-01-07),

9. 8560904 - Scan chain fault diagnosis (2013-10-15),

10. 8539389 - Correlation of device manufacturing defect data with device electrical test data (2013-09-17),

11. 8453088 - Suspect logical region synthesis and simulation using device design and test information (2013-05-28),

12. 8412991 - Scan chain fault diagnosis (2013-04-02),

13. 7036062 - Single board DFT integrated circuit tester (2006-04-25),

14. 6956394 - Tester architecture for testing semiconductor integrated circuits (2005-10-18),

15. 6925406 - Scan test viewing and analysis tool (2005-08-02),

TESEDA CORPORATION is a leading technology solutions provider specializing in software development, data analytics, and cyber security solutions. With a global clientele, our team of experts consistently delivers innovative and tailored solutions to address complex business challenges. Visit our website for more information and to explore our range of services.

Profile summary based on public USPTO records.

Company Badge

USPTO Data Jan 1 1976 - Sep 29 2026

15 Patents

#64 in Portland, OR

#210 in Oregon

#21,026 in US

#39,846 in the World

Portland, OR, United States of America

Teseda Corporation

Forward Citations = 63

15 inventors:

Ralph Sanchez (6 out of 6 patents)

Armagan Akar (5 out of 5 patents)

John Raykowski (4 out of 4 patents)

4. Rich Ackerman (4 out of 4 patents)

5. Theodore Clifton Bernard (2 out of 2 patents)

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