For the Inventor, By the Inventor

Enter assignee name

San Francisco, CA, United States of America

Pakal Technologies, LLC

USPTO Granted Patents = 32

% Expired Patents = 3.1

EPO Patents = 2

Trademarks = 4

Forward Citations = 27

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8 inventors (with patents filed for the assignee):

Richard A Blanchard (26 out of 271 patents)

Hidenori Akiyama (20 out of 22 patents)

Vladimir Rodov (20 out of 49 patents)

4. Woytek Tworzydlo (17 out of 17 patents)

5. Paul McKay Moore (10 out of 22 patents)

6. Richard A Blanchard (3 out of 46 patents)

7. Woytek Tworzydio (1 out of 1 patent)

8. Gary Michael Hurtz (1 out of 14 patents)

32 patents: Sort by Forward Citations

1. 12568666 - Insulated gate turn-off device with short channel PMOS transistor (2026-03-03),

2. 12568639 - Insulated gate power device with epitaxially grown substrate layers (2026-03-03),

3. 12249642 - Vertical insulated gate power switch with isolated base contact regions (2025-03-11),

4. 12142660 - Insulated trench gates with multiple layers for improved performance of semiconductor devices (2024-11-12),

5. 11916138 - Etch stop layer for injecting carriers into drift layer for a vertical power device (2024-02-27),

6. 11824092 - Insulated trench gates with dopants implanted through gate oxide (2023-11-21),

7. 11757017 - Anti-parallel diode formed using damaged crystal structure in a vertical power device (2023-09-12),

8. 11610987 - NPNP layered MOS-gated trench device having lowered operating voltage (2023-03-21),

9. 11437989 - Insulated gate power device with independently controlled segments (2022-09-06),

10. 11393901 - Cell layouts for MOS-gated devices for improved forward voltage (2022-07-19),

11. 11145717 - Cellular insulated gate power device with edge design to prevent failure near edge (2021-10-12),

12. 11114553 - Lateral insulated gate turn-off device with induced emitter (2021-09-07),

13. 11114552 - Insulated gate turn-off device with designated breakdown areas between gate trenches (2021-09-07),

14. 10797131 - Enhancements to cell layout and fabrication techniques for MOS-gated devices (2020-10-06),

15. 10777670 - Vertical insulated gate turn-off thyristor with intermediate p+ layer in p-base formed using epitaxial layer (2020-09-15),

Pakal Technologies, LLC is a leading technology solutions provider specializing in software development, web design, and IT consulting. With a team of talented professionals, we deliver innovative and scalable solutions to help businesses achieve their goals. Visit our website to learn more about our services and explore how we can assist your organization in staying ahead in the digital landscape.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Sep 15 2026

32 Patents

#148 in San Francisco, CA

#2,527 in California

#10,574 in US

#20,618 in the World

San Francisco, CA, United States of America

Pakal Technologies, LLC

Forward Citations = 27

8 inventors:

Richard A Blanchard (26 out of 271 patents)

Hidenori Akiyama (20 out of 22 patents)

Vladimir Rodov (20 out of 49 patents)

4. Woytek Tworzydlo (17 out of 17 patents)

5. Paul McKay Moore (10 out of 22 patents)

Please report any incorrect information to [email protected]

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