The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Mar. 28, 2019
Applicant:

Pakal Technologies, Inc., San Francisco, CA (US);

Inventors:

Richard A. Blanchard, Los Altos, CA (US);

Hidenori Akiyama, Miyagi, JP;

Vladimir Rodov, Seattle, WA (US);

Woytek Tworzydlo, Austin, TX (US);

Assignee:

Pakal Technologies, Inc., San Francisco, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/265 (2006.01); H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/745 (2006.01); H01L 29/739 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0696 (2013.01); H01L 21/26513 (2013.01); H01L 21/26586 (2013.01); H01L 21/28017 (2013.01); H01L 29/4236 (2013.01); H01L 29/7397 (2013.01); H01L 29/7455 (2013.01); H01L 29/7813 (2013.01);
Abstract

An insulated gate turn-off (IGTO) device, formed as a die, has a layered structure including a p+ layer (e.g., a substrate), an n− epi layer, a p-well, trenched insulated gate regions formed in the p-well, and n+ regions between the gate regions, so that vertical NPN and PNP transistors are formed. The device may be formed of a matrix of cells or may be interdigitated. To turn the device on, a positive voltage is applied to the gate, referenced to the cathode. The cells further contain a vertical p-channel MOSFET, for rapidly turning the device off. The p-channel MOSFET may be made a depletion mode device by implanting boron ions at an angle into the trenches to create a p-channel. This allows the IGTO device to be turned off with a zero gate voltage while in a latch-up condition, when the device is acting like a thyristor.


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