The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Apr. 20, 2022
Applicant:

Pakal Technologies, Inc., San Francisco, CA (US);

Inventors:

Paul M Moore, Hillsboro, OR (US);

Vladimir Rodov, Seattle, WA (US);

Richard A Blanchard, Los Altos, CA (US);

Assignee:

PAKAL TECHNOLOGIES, INC, San Francisco, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/745 (2006.01); H01L 29/66 (2006.01); H01L 29/74 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7455 (2013.01); H01L 29/66363 (2013.01); H01L 29/7424 (2013.01);
Abstract

A sacrificial substrate wafer is provided. A low resistivity etch stop layer is formed on or in the top surface of the wafer. The etch stop layer may be a highly doped, p+ type epitaxially grown layer, or an implanted p+ type boron layer, or an epitaxially grown p+ type SiGe layer. Various epitaxial layers, such as an n− type drift layer, and doped regions are then formed over the etch stop layer to form a vertical power device. The starting wafer is then removed by a combination of mechanical grinding/polishing to leave a thinner layer of the starting wafer. A chemical or plasma etch is then used to remove the remainder of the starting wafer, using the etch stop layer to automatically stop the etching. A bottom metal electrode is then formed on the etch stop layer. The etch stop layer injects hole carriers into the drift layer.


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